DK86064-2 Fujitsu Semiconductor America Inc, DK86064-2 Datasheet - Page 12

KIT DEB DUAL 14BIT DAC MB86064

DK86064-2

Manufacturer Part Number
DK86064-2
Description
KIT DEB DUAL 14BIT DAC MB86064
Manufacturer
Fujitsu Semiconductor America Inc
Datasheets

Specifications of DK86064-2

Number Of Dac's
2
Number Of Bits
14
Outputs And Type
1, Differential
Sampling Rate (per Second)
1G
Data Interface
Serial
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
MB86064
For Use With
865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1010
1.2.2 Adjusting the Input Data Timing
When using the Clock Outputs to synchronise the data generator it is possible to adjust the relative
input data timing through DAC Core register SYSTEM CLOCK DELAYS [7:4] & [3:0], clkout1_clk_dly
& clkout2_clk_dly. See Table 5 and Table 6. Increasing this setting delays the arrival of input data.
Page 12 of 52
Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
Port A data input
Port B data input
WMM CONFIG
14-bit LVDS
14-bit LVDS
Table 9: Waveform Memory Module Register: WMM CONFIG [0x00] (Part 2 of 2)
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
(bit)
4
Figure 7 Direct Data Routing from the LVDS Interface
data_direct
Label
Production
0x1C4 - pg11
en_int_term
0x1C4 - pg11
en_int_term
DAC A and DAC B data source
0 = LVDS data directly (default), 1 = Waveform Memory Module
Copyright © 2004-2005 Fujitsu Microelectronics Europe GmbH
MB86064 Dual 14-bit 1GSa/s DAC
Function
October 2005 Version 1.2
data_direct = ‘0’ (default)
0x00 - pg12
FME/MS/DAC80/DS/4972
DAC A
DAC B
(14-bit)
(14-bit)

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