DK86064-2 Fujitsu Semiconductor America Inc, DK86064-2 Datasheet - Page 50

• Manufacturer Part Number: DK86064-2
• Description: KIT DEB DUAL 14BIT DAC MB86064
• Manufacturer: Fujitsu Semiconductor America Inc

Specifications of DK86064-2

• Number Of Dac's: 2
• Number Of Bits: 14
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MB86064
• For Use With: 865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1010

Appendix A Default Register Settings
Appendix A.1 DAC Core Registers
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Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
R Read-only bit
X Don’t care
SYSTEM CLOCK
CLOCK DELAYS
Not used
Reserved. Set to defined value
DAC CORE
DAC A & B
Register
SYSTEM
CONFIG
DELAYS
POWER
THOLD
THOLD
DOWN
DAC A
DAC A
DAC B
DAC B
CORE
SEED
SEED
TEST
MISC
DAC
DAC
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
01 1001 0000
01 1001 0001 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0
01 1010 0000
01 1010 0001 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0
01 1011 0010
01 1100 0000
01 1100 0001
01 1100 0010
01 1100 0100
01 1011 0011
01 1100 0011
Address
1C0
1C2
1C3
1C4
190
1A0
1A1
1B2
1B3
1C1
191
16
16
16
16
16
16
16
16
16
16
16
Production
27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[27:21]
[27:21]
[20:14]
[20:14]
Copyright © 2004-2005 Fujitsu Microelectronics Europe GmbH
MB86064 Dual 14-bit 1GSa/s DAC
Register Bits
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:12]
12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 1 1 0 0 0 0 0 0
[13:7]
[13:7]
October 2005 Version 1.2
[11:8]
9 8
0 0 0 1 0 0 0 1 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
7
1 0 0 0 0 0 1 0
FME/MS/DAC80/DS/4972
[7:4]
[7:4]
[6:2]
4 3 2 1 0
0 0 0 0 0
[7:0]
[7:0]
[6:0]
[6:0]
[3:0]
X 0 0
[3:0]
X 0 0
2 1 0
[2:0]
1 0