DK86064-2 Fujitsu Semiconductor America Inc, DK86064-2 Datasheet - Page 15

KIT DEB DUAL 14BIT DAC MB86064

DK86064-2

Manufacturer Part Number
DK86064-2
Description
KIT DEB DUAL 14BIT DAC MB86064
Manufacturer
Fujitsu Semiconductor America Inc
Datasheets

Specifications of DK86064-2

Number Of Dac's
2
Number Of Bits
14
Outputs And Type
1, Differential
Sampling Rate (per Second)
1G
Data Interface
Serial
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
MB86064
For Use With
865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1010
October 2005 Version 1.2
FME/MS/DAC80/DS/4972
MB86064 Dual 14-bit 1GSa/s DAC
Analog output performance benefits from the chosen DAC core architecture, identified in Section 1
as similar to two interleaved DACs running at half rate. The big advantage of this approach compared
to a single DAC running at half the rate is much reduced sinx/x roll-off which gives increased output
power and better in-band flatness when generating high output frequencies (e.g. 200MHz and
above). This is illustrated in Figure 9 as line 1. An alternative approach using a return-to-zero output
stage admittedly has the same sinx/x roll off (and switch driver speed) but 6dB lower output power
and a large image at Fclk-Fout. See Line 2. For reference, line 3 illustrates a conventional DAC
running at half rate.
Another aspect of this comparison which should not be overlooked concerns noise performance,
increasingly quoted in units of dBm/Hz. In terms of SNR there is some 7dBs of degradation to
consider when comparing a 300MHz test for a standard 400MSa/s DAC with the MB86064 running
at 800MSa/s. This is relevant to the Noise floor figures quoted in section 4.5 Dynamic Performance.
1.6.1 Frequency Planning
Systems that require superior dynamic performance should not ignore the DAC from the task of
frequency planning. To do so could result in impractical specifications or at worst increase the cost
and power of the converter that would need to be selected. The MB86064 is designed to deliver the
very best dynamic performance across wide bandwidths, as required for communications systems
and in particular for multi-carrier applications. Preferred generating bands can be demonstrated as
those centred at 0.2, 0.3 and 0.4 Fdac. In addition, while allowing certain images in-band though at
levels unlikely to impact on performance other possible centre frequencies are 0.125 and 0.375 Fdac.
It is important to remember that conventional DACs running at half the rate or those incorporating a
return-to-zero output stage are subject to exactly the same frequency planning constraints as these
are defined by Nyquist’s theorem. However, a key advantage of the MB86064 is its ability to generate
wide bandwidth signals in the 2nd Nyquist zone where conventional DACs will be prevented from
doing so due to Sinx/x attenuation.
Copyright © 2004-2005 Fujitsu Microelectronics Europe GmbH
Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
dBFS
-6
0
Figure 9 Benefits of DAC core Architecture to Sinx/x Response
high direct-IF
Generating
Region
Target
Production
Frequency
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