DK86064-2 Fujitsu Semiconductor America Inc, DK86064-2 Datasheet - Page 31

KIT DEB DUAL 14BIT DAC MB86064

DK86064-2

Manufacturer Part Number
DK86064-2
Description
KIT DEB DUAL 14BIT DAC MB86064
Manufacturer
Fujitsu Semiconductor America Inc
Datasheets

Specifications of DK86064-2

Number Of Dac's
2
Number Of Bits
14
Outputs And Type
1, Differential
Sampling Rate (per Second)
1G
Data Interface
Serial
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
MB86064
For Use With
865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
865-1010
October 2005 Version 1.2
FME/MS/DAC80/DS/4972
MB86064 Dual 14-bit 1GSa/s DAC
4.5
Copyright © 2004-2005 Fujitsu Microelectronics Europe GmbH
Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
Adjacent Channel Leakage Ratio
Images
T
coupled output presenting 33 effective differential load, Filtered Sinewave clock unless otherwise specified.
1. Excludes f
2. Excludes f
3. 240kHz tone spacing with non-aligned phase alignment. Peak to rms = 6.4dB. 800MSa/s
Analog Output
Noise Floor
Clock feed-through
Crosstalk
T
coupled output presenting 33 effective differential load, Filtered Sinewave clock unless otherwise specified.
1. In SNR terms compares to -159dBm/Hz for 500MSa/s DAC or -163dBm/Hz for 400MSa/s.
2. Measured using 4 tone test, each tone at -15dBFS with 1.2MHz spacing, centred at 276MHz ±4MHz
A
A
1 x UMTS carrier, 5MHz channel spacing
4 x UMTS carriers, 5MHz channel spacing
Interleaved DAC image
2nd order interleaved DAC image
CLK In to Analog Out delay (to 0.1%)
Output settling time (to 0.1%)
Output rise time (10% to 90%)
Output fall time (90% to 10%)
Single tone at -1dBFS, 624MSa/s
(min) to T
(min) to T
30.72MHz centre frequency, 245.76MSa/s
276.48MHz centre frequency, 737.28MSa/s
276.48MHz centre frequency, 737.28MSa/s
20 MHz tone
247 MHz tone
300 MHz tone
Dynamic Performance
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
A
A
(max), AVD33 = +3.3V, AVSS = 0V, DVDD = +1.8V, DVSS = 0V, I
(max), AVD33 = +3.3V, AVSS = 0V, DVDD = +1.8V, DVSS = 0V, I
clk
clk
Parameter (Continued)
, f
& f
clk
clk
-f
out
-f
Parameter
out
& f
image
clk
-2.f
out
images
Notes
Notes
1
2
F
Symbol
Symbol
clk
ACLR
2.F
F
F
t
clkop
clk
set
t
t
t
- F
o
r
f
sig
-
sig
Production
FS
FS
Min.
Min.
69
64
= 20mA, Differential Transformer
= 20mA, Differential Transformer
Ratings
Ratings
-166
-159
-156
Typ.
Typ.
4.1
1.8
0.6
0.6
-46
84
76
74
40
57
67
Max.
Max.
-42
30
50
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dBm/Hz
dBm/Hz
dBm/Hz
Units
Units
dBm
dBc
dBc
dBc
dBc
dBc
dBc
ns
ns
ns
ns

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