DK86064-2 Fujitsu Semiconductor America Inc, DK86064-2 Datasheet - Page 14

• Manufacturer Part Number: DK86064-2
• Description: KIT DEB DUAL 14BIT DAC MB86064
• Manufacturer: Fujitsu Semiconductor America Inc

Specifications of DK86064-2

• Number Of Dac's: 2
• Number Of Bits: 14
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MB86064
• For Use With: 865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1010

1.4
A 1.2V bandgap reference is provided on-chip, although this is
left unconnected when an external reference is to be used. To
use the internal bandgap reference, pins BGAP and VREF
should be linked via a 1k
to AVSS with a 100nF capacitor.
For maximum absolute accuracy an external voltage reference
should be used. This should be connected to VREF through a
1k
voltage reference should be powered from the AVD25 pin, which
is a regulated 2.5V output with high power supply noise rejection.
1.5
From the voltage reference the full scale analog output current is defined by an external reference
resistor, R
e.g. With Vref = 1.20V, to give a 20mA full scale output, Rref =
960 . Designs that for simplicity use a 1k
a marginally lower full scale output current of 19.2mA (-0.35dB)
unless using an external reference to provide a higher voltage of
1.25V.
1.6
The DAC outputs are differential current type. A termination resistor, or load, should be used
appropriate for the recommended output swing. Each DAC may be individually powered down.
Page 14 of 52
Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
R
resistor and decoupled as described above. The external
ref
Voltage Reference
Analog Output Reference Resistor
Analog Outputs
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
The appropriate setting of these bits is dependent on the power-down status of the DAC
cores, determined by register POWER DOWN [0x1C3] bits pdn_daca and pdn_dacb.
ref
X
X
1
1
0
, where,
DAC CONFIG
16
-------------------- -
I
OP
(bits)
V
ref
Table 10: DAC Core Register: DAC CONFIG [0x1C0]
X
X
0
1
0
resistor. VREF should be decoupled
Production
With DAC A and DAC B disabled
With DAC A enabled, DAC B disabled
With DAC A disabled, DAC B enabled
With DAC A and DAC B enabled (default)
resistor will result in
Copyright © 2004-2005 Fujitsu Microelectronics Europe GmbH
MB86064 Dual 14-bit 1GSa/s DAC
Configuration
MB86064
MB86064
BGAP
VREF
October 2005 Version 1.2
RREF
FME/MS/DAC80/DS/4972
AVSS
AVSS
1k
100nF