DK86064-2 Fujitsu Semiconductor America Inc, DK86064-2 Datasheet - Page 42

• Manufacturer Part Number: DK86064-2
• Description: KIT DEB DUAL 14BIT DAC MB86064
• Manufacturer: Fujitsu Semiconductor America Inc

Specifications of DK86064-2

• Number Of Dac's: 2
• Number Of Bits: 14
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MB86064
• For Use With: 865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1010

6.2
The differential clock input to the device needs to be biased about the specified typical common mode
input voltage. The exact interface circuitry will depend on the functionality required but an example
is illustrated in Figure 20.
In most applications an external single-ended RF clock will not be used and a differential PECL clock
could be connected directly to the AC-coupling capacitors.
The above circuit utilises the on-chip regulated 1.8V supply, combined with the 1k/2k resistive
divider, to generate a 1.2V common mode voltage. This could easily have been applied to the clock
signals through higher value resistors, e.g. 4k7, in place of the 50R termination resistors. In this
instance a 100R differential load should be added.
Where adjustment to the clock DC offset is required a trim-pot or trim-DAC could be included as part
of the 1k/2k potential divider circuit.
Page 42 of 52
Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
RF Input Clock
Input Clock Interfacing
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
DVSS
ADTL2-18
Production
Figure 20 Clock Input Interfacing
Copyright © 2004-2005 Fujitsu Microelectronics Europe GmbH
MB86064 Dual 14-bit 1GSa/s DAC
50R
50R
1k
2k
AVSS
October 2005 Version 1.2
100nF
CLKIN
AVD18_CLK
AVSS
CLKINB
FME/MS/DAC80/DS/4972