DK86064-2 Fujitsu Semiconductor America Inc, DK86064-2 Datasheet - Page 47

• Manufacturer Part Number: DK86064-2
• Description: KIT DEB DUAL 14BIT DAC MB86064
• Manufacturer: Fujitsu Semiconductor America Inc

Specifications of DK86064-2

• Number Of Dac's: 2
• Number Of Bits: 14
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MB86064
• For Use With: 865-1111 - DAC DK FPGA ADAPTER BOARD865-1012 - KIT DEV DUAL 14BIT MB86064 SMA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1010

October 2005 Version 1.2
FME/MS/DAC80/DS/4972
MB86064 Dual 14-bit 1GSa/s DAC
6.6
Requests for technical support on the MB86064 may be e-mailed to:
Copyright © 2004-2005 Fujitsu Microelectronics Europe GmbH
Disclaimer : The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
• {load waveform data into memories, start addr=0 length=2047(0x7FF)}
• {this length corresponds to a vector length of 16k points}
• 0x13
• 0x12
• 0x13
• {repeat above instruction 2045 times}
• 0x13
• 0x23
• 0x22
• 0x23
• {repeat above instruction 2045 times}
• 0x23
• {Repeat for RAM B}
• 0x12
• 0x12
• 0x22
• 0x22
• 0x11
• 0x21
• 0x10
• 0x10
• 0x00
• [e-mail]
Technical Support
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
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0x27FF800
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0x27FF800
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0x07FF800
0x0FFF800
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0x33
0x33
0x01
0x00
0x10
{write first data word}
program RAM controller: RAM A, EVEN, write
{write next data word}
{write last data word}
{write first data word}
program RAM controller: RAM A, ODD, write
{write next data word}
{write last data word}
program RAM controller: RAM A, EVEN, run
program RAM controller: RAM B, EVEN, run
program RAM controller: RAM A, ODD, run
program RAM controller: RAM B, ODD, run
set EVEN Mux0 = Mux1 = RAM data
set ODD Mux0 = Mux1 = RAM data
set software reset to sync RAMs
clear software reset to sync RAMs
set WMM/LVDS data mux to WMM
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