EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 237
EP3SL150F780I3N
Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet
1.EP3SL110.pdf
(904 pages)
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Altera Corporation
November 2007
Altera recommends performing IBIS or SPICE simulations to determine
the right current strength setting for your specific application.
Programmable Slew Rate Control
The output buffer for each Stratix III device regular- and dual-function
I/O pin has a programmable output slew-rate control that you can
configure for low-noise or high-speed performance. A faster slew rate
provides high-speed transitions for high-performance systems. A slow
slew rate can help reduce system noise, but adds a nominal delay to rising
and falling edges. Each I/O pin has an individual slew-rate control,
allowing you to specify the slew rate on a pin-by-pin basis.
1
The Quartus II software allows four settings for programmable slew rate
control—0, 1, 2, and 3—where 0 is slow slew rate and 3 is fast slew rate.
In the Quartus II software, the default setting for 2.5-, 1.8-,1.5-,1.2-, and
3.3/3.0-V LVTTL/LVCMOS is 1. The default setting for 3.0-V PCI/PCI-X
LVDS_E_1R, mini-LVDS_E_1R and RSDS_E_1R, SSTL-2, -18, -15 Class I
and Class II and HSTL-18, -15, -12 Class I and Class II is 3. The only
allowed (default) setting for LVDS_E_3R, mini-LVDS_E_3R, and
RSDS_E_3R is 2.
Note to
(1)
SSTL-15 Class II
HSTL-18 Class I
HSTL-18 Class II
HSTL-15 Class I
HSTL-15 Class II
HSTL-12 Class I
HSTL-12 Class II
Table 7–4. Programmable Current Strength (Part 2 of 2)
The default setting in the Quartus II software is 50
for all non-voltage reference and HSTL/SSTL class I I/O standards. The default
setting is 25
standards.
I/O Standard
Table 7–4
You cannot use the programmable slew rate feature when using
OCT R
Ω
S
.
OCT Rs without calibration for HSTL/SSTL class II I/O
I
OH
/ I
Column I/O Pins
Setting (mA) for
OL
12, 10, 8, 6, 4
12, 10, 8, 6, 4
12, 10, 8, 6, 4
Current Strength
16, 8
16
16
16
Stratix III Device Handbook, Volume 1
Stratix III Device I/O Features
Ω
I
OCT Rs without calibration
OH
/ I
Setting (mA) for
OL
12, 10, 8, 6, 4
Row I/O Pins
Note (1)
Current Strength
8, 6, 4
8, 6, 4
16
—
—
—
7–19
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