EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 87
EP3SL150F780I3N
Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet
1.EP3SL110.pdf
(904 pages)
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Table 4–6. Stratix III M144K Block Mixed-Width Configurations (Simple Dual-Port Mode)
Read Port
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Table 4–6
simple dual-port mode.
In simple dual-port mode, M9K and M144K blocks support separate
write-enable and read-enable signals. You can save power by keeping the
read-enable signal low (inactive) when not reading. Read-during-write
operations to the same address can either output a don't care value or old
data. To choose the desired behavior, set the read-during-write behavior
to either don’t care or old data in the RAM MegaWizard in the Quartus II
software. See
behavior.
MLABs only support a write-enable signal. Read-during-write behavior
for the MLABs can be either don't care, new data, or old data. The
available choices depend on the configuration of the MLAB.
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shows the mixed width configurations for the M144K blocks in
“Read During Write” on page 4–21
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TriMatrix Embedded Memory Blocks in Stratix III Devices
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Write Port
64
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Stratix III Device Handbook, Volume 1
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for more details on this
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