EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 850

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EP3SL150F780I3N

Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet

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I/O Timing
1–338
Stratix III Device Handbook, Volume 2
3.0-V PCI-X
3.3-V LVTTL
3.3-V
LVCMOS
3.0-V LVTTL
3.0-V
LVCMOS
Table 1–135. EP3SE260 Column Pins Input Timing Parameters (Part 4 of 4)
Table 1–136. EP3SE260 Row Pins Input Timing Parameters (Part 1 of 4)
I/O Standard
I/O Standard
GCLK
GCLK
Clock
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
PLL
Clock
PLL
PLL
PLL
PLL
Parameter
Parameter
Table 1–136
single-ended I/O standards.
t
t
t
t
SU
SU
H
H
t
t
t
t
t
t
t
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
SU
t
H
H
H
H
H
H
H
H
Industrial Commercial
Industrial Commercial
specifies EP3SE260 Row Pins Input Timing parameters for
Fast Model
Fast Model
-1.166
-0.392
1.274
0.500
-1.120
-0.418
-1.120
-0.418
-1.120
-0.418
-1.120
-0.418
1.222
0.520
1.222
0.520
1.222
0.520
1.222
0.520
V
1.1V
CCL
-2
V
1.1V
CCL
-2
=
=
-1.810 -1.943 -1.874 -2.327
-0.913 -1.037 -0.978 -0.865
V
1.971
1.074
1.1V
CCL
-1.692 -1.781 -1.728 -2.175
-1.030 -1.166 -1.102 -1.014
-1.692 -1.781 -1.728 -2.175
-1.030 -1.166 -1.102 -1.014
-1.692 -1.781 -1.728 -2.175
-1.030 -1.166 -1.102 -1.014
-1.692 -1.781 -1.728 -2.175
-1.030 -1.166 -1.102 -1.014
-3
V
1.854
1.192
1.854
1.192
1.854
1.192
1.854
1.192
1.1V
CCL
-3
=
=
V
2.118
1.212
1.1V
CCL
-4
V
1.960
1.345
1.960
1.345
1.960
1.345
1.960
1.345
1.1V
CCL
-4
=
=
Altera Corporation
V
2.041
1.145
1.1V
CCL
1.897
1.271
1.897
1.271
1.897
1.271
1.897
1.271
V
1.1V
November 2007
CCL
=
-4L
=
-4L
V
2.488
1.026
0.9V
CCL
2.337
1.176
2.337
1.176
2.337
1.176
2.337
1.176
V
0.9V
CCL
=
=
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