AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 491

• Manufacturer Part Number: AT32AP7001-ALUT
• Description: IC MCU 32BIT AVR32 208-LQFP
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7001-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, POR, PWM, WDT
• Number Of I /o: 90
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, ISI, MCI, PS2, SPI, TWI, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 90
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 1 Channel
• Package: 208PQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Figure 28-3.
28.6.3
28.6.3.1
28.6.3.2
32015G–AVR32–09/09
Connection to External Devices
SMC
Data bus width
Byte write or byte select access
Memory Connections for Six External Devices
NCS[0] - NCS[5]
D[31:0]
A[25:0]
NWE
NRD
If the physical memory device connected on one chip select is smaller than 64Mbytes, it wraps
around and appears to be repeated within this space. The SMC correctly handles any valid
access to the memory device within the page (see
A[25:0] is only significant for 8-bit memory, A[25:1] is used for 16-bit memory, A[25:2] is used for
32-bit memory.
A data bus width of 8, 16, or 32 bits can be selected for each chip select. This option is con-
trolled by the Data Bus Width field in the Mode Register (MODE.DBW) for the corresponding
chip select.
Figure 28-4 on page 492
page 492
bit memories connected as a single 32-bit memory.
Each chip select with a 16-bit or 32-bit data bus can operate with one of two different types of
write access: byte write or byte select access. This is controlled by the Byte Access Type bit in
the MODE register (MODE.BAT) for the corresponding chip select.
shows how to connect a 512K x 16-bit memory on NCS2.
shows how to connect a 512K x 8-bit memory on NCS2.
8 or 16 or 32
NCS0
NCS1
NCS2
Figure 28-3 on page
A[25:0]
Memory Enable
Output Enable
Write Enable
D[31:0] or D[15:0] or
D[7:0]
NCS3
Memory Enable
NCS4
Memory Enable
NCS5
Memory Enable
Memory Enable
Figure 28-6
Memory Enable
AT32AP7001
491).
Figure 28-5 on
shows two 16-
491