AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 618

• Manufacturer Part Number: AT32AP7001-ALUT
• Description: IC MCU 32BIT AVR32 208-LQFP
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7001-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, POR, PWM, WDT
• Number Of I /o: 90
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, ISI, MCI, PS2, SPI, TWI, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 90
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 1 Channel
• Package: 208PQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

32.6.6.9
32.6.6.10
32.6.6.11
32.6.6.12
32015G–AVR32–09/09
Data OUT
Bulk OUT or Interrupt OUT
Bulk OUT or Interrupt OUT: Receiving a Packet Under Application Control (Host to Device)
Bulk OUT or Interrupt OUT: Sending a Buffer Using DMA (Host To Device)
• ERR_FLUSH + ERR_TRANS: The first token IN has been answered and it was the only one
• ERR_FL_ISO + ERR_FLUSH + ERR_TRANS: The first token IN has been treated, the data for
Like data IN, data OUT packets are sent by the host during the data or the status stage of con-
trol transfer or during an interrupt/bulk/isochronous OUT transfer. Data buffers are sent packet
by packet under the control of the application or under the control of the DMA channel.
Algorithm Description for Each Packet:
• The application enables an interrupt on RX_BK_RDY.
• When an interrupt on RX_BK_RDY is received, the application knows that EPTSTAx register
• The application reads the BYTE_COUNT bytes from the endpoint.
• The application clears RX_BK_RDY.
Note: If the application does not know the size of the transfer, it may not be a good option to use
AUTO_VALID. Because if a zero-length-packet is received, the RX_BK_RDY is automatically
cleared by the AUTO_VALID hardware and if the endpoint interrupt is triggered, the software will
not find its originating flag when reading the EPTSTAx register.
Algorithm to Fill Several Packets:
• The application enables the interrupts of BUSY_BANK and AUTO_VALID.
• When a BUSY_BANK interrupt is received, the application knows that all banks available for
If the application doesn’t know the size of the receive buffer, instead of using the BUSY_BANK
interrupt, the application must use RX_BK_RDY.
To use the DMA setting, the AUTO_VALID field is mandatory.
See
information.
DMA Configuration Example:
1. First program DMAADDRESSx with the address of the buffer that should be transferred.
2. Enable the interrupt of the DMA in IEN
3. Program the DMA Channelx Control Register:
received, a second bank has been validated but not the third, whereas NB_TRANS was
waiting for three transactions.
the second Token IN was not available in time, but the second bank has been validated before
the end of the microframe. The third bank has not been validated, but three transactions have
been set in NB_TRANS.
BYTE_COUNT bytes have been received.
the endpoint have been filled. Thus, the application can read all banks available.
– Size of buffer to be sent.
– END_B_EN: Can be used for OUT packet truncation (discarding of unbuffered packet
32.6.6.6 Bulk IN or Interrupt IN: Sending a Buffer Using DMA (Device to Host)
data) at the end of DMA buffer.
AT32AP7001
for more
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