AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 583
AT32AP7001-ALUT
Manufacturer Part Number
AT32AP7001-ALUT
Description
IC MCU 32BIT AVR32 208-LQFP
Manufacturer
Atmel
Series
AVR®32 AP7r
Specifications of AT32AP7001-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, POR, PWM, WDT
Number Of I /o
90
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EBI, ISI, MCI, PS2, SPI, TWI, USB
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
90
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 1 Channel
Package
208PQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32AP7001-ALUT
Manufacturer:
EVERLIGHT
Quantity:
12 000
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31.8
Table 31-6.
Note:
32015G–AVR32–09/09
0x38 - 0x3C
0x50-0xFC
0x50-0xF8
Offset
0xFC
0x0C
0x2C
0x4C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x30
0x34
0x40
0x44
0x48
0x1C
User Interface
1. The response register can be read by N accesses at the same RSPR or at consecutive addresses (0x20 to 0x2C).
N depends on the size of the response.
Register Mapping
Register
Control Register
Mode Register
Data Timeout Register
SD/SDIO Card Register
Argument Register
Command Register
Block Register
Reserved
Response Register
Response Register
Response Register
Response Register
Receive Data Register
Transmit Data Register
Reserved
Status Register
Interrupt Enable Register
Interrupt Disable Register
Reserved
Version Register
Reserved
Interrupt Mask Register
(1)
(1)
(1)
(1)
Register Name
VERSION
CMDR
SDCR
ARGR
DTOR
RSPR
RSPR
RSPR
RSPR
BLKR
RDR
TDR
IMR
IER
IDR
MR
CR
SR
–
–
–
–
Read/Write
Read/write
Read/write
Read/write
Read/write
Read/write
Read-only
Write
Write
Read
Read
Read
Read
Read
Write
Read
Write
Write
Read
–
–
–
–
AT32AP7001
Reset
0x25
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
–
–
–
–
–
583
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