AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 616
AT32AP7001-ALUT
Manufacturer Part Number
AT32AP7001-ALUT
Description
IC MCU 32BIT AVR32 208-LQFP
Manufacturer
Atmel
Series
AVR®32 AP7r
Specifications of AT32AP7001-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, POR, PWM, WDT
Number Of I /o
90
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EBI, ISI, MCI, PS2, SPI, TWI, USB
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
90
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 1 Channel
Package
208PQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32AP7001-ALUT
Manufacturer:
EVERLIGHT
Quantity:
12 000
- Current page: 616 of 829
- Download datasheet (12Mb)
Figure 32-11. Autovalid with DMA
Note:
32.6.6.7
32015G–AVR32–09/09
In the illustration above Autovalid validates a bank as full, although this might not be the case, in order to continue processing
data and to send to DMA.
Bank (system)
Write
Bank (usb)
Virtual TX_PK_RDY Bank 0
Virtual TX_PK_RDY Bank 1
TX_PK_RDY
(Virtual 0 & Virtual 1)
Isochronous IN
Bank 1
Bank 0
write bank 0
Bank 0
Isochronous-IN is used to transmit a stream of data whose timing is implied by the delivery rate.
Isochronous transfer provides periodic, continuous communication between host and device.
It guarantees bandwidth and low latencies appropriate for telephony, audio, video, etc.
If the endpoint is not available (TX_PK_RDY = 0), then the device does not answer to the host.
An ERR_FL_ISO interrupt is generated in the EPTSTAx register and once enabled, then sent to
the CPU.
The STALL_SNT command bit is not used for an ISO-IN endpoint.
bank 0 is full
write bank 1
Bank 1
Bank 0
bank 1 is full
IN data 0
Bank 0
write bank 0
bank 0 is full
Bank 1
IN data 1
Bank 1
Bank 0
IN data 0
AT32AP7001
Bank 1
616
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