AT91SAM7X256B-CU Atmel, AT91SAM7X256B-CU Datasheet - Page 174

• Manufacturer Part Number: AT91SAM7X256B-CU
• Description: IC MCU 256KB FLASH 100TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7X256B-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: 91S
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN, Ethernet, SPI, I2S, TWI, USART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Package: 100TFBGA
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 55 MHz
• On-chip Adc: 8-chx10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

23.8.16
Register Name:
Access Type:
Reset Value:
• SIVR: Spurious Interrupt Vector Register
The user may store the address of a spurious interrupt handler in this register. The written value is returned in AIC_IVR in
case of a spurious interrupt and in AIC_FVR in case of a spurious fast interrupt.
23.8.17
Register Name:
Access Type:
Reset Value:
• PROT: Protection Mode
0 = The Protection Mode is disabled.
1 = The Protection Mode is enabled.
• GMSK: General Mask
0 = The nIRQ and nFIQ lines are normally controlled by the AIC.
1 = The nIRQ and nFIQ lines are tied to their inactive state.
174
31
23
15
31
23
15
7
–
–
–
7
–
AT91SAM7X512/256/128 Preliminary
AIC Spurious Interrupt Vector Register
AIC Debug Control Register
AIC_SPU
Read-write
30
22
14
AIC_DEBUG
Read-write
0
30
22
14
0
6
–
–
–
6
–
29
21
13
29
21
13
5
–
–
–
5
–
28
20
12
28
20
12
4
–
–
–
4
–
SIVR
SIVR
SIVR
SIVR
27
19
11
27
19
11
3
–
–
–
3
–
26
18
10
26
18
10
2
–
–
–
2
–
GMSK
25
17
25
17
9
1
–
–
9
–
1
6120H–ATARM–17-Feb-09
PROT
24
16
24
16
8
0
–
–
8
–
0