AT91SAM7X256B-CU Atmel, AT91SAM7X256B-CU Datasheet - Page 428

• Manufacturer Part Number: AT91SAM7X256B-CU
• Description: IC MCU 256KB FLASH 100TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7X256B-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: 91S
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN, Ethernet, SPI, I2S, TWI, USART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Package: 100TFBGA
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 55 MHz
• On-chip Adc: 8-chx10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

428
AT91SAM7X512/256/128 Preliminary
When center aligned, the internal channel counter increases up to CPRD and.decreases down
to 0. This ends the period.
When left aligned, the internal channel counter increases up to CPRD and is reset. This ends
the period.
Thus, for the same CPRD value, the period for a center aligned channel is twice the period for a
left aligned channel.
Waveforms are fixed at 0 when:
Waveforms are fixed at 1 (once the channel is enabled) when:
The waveform polarity must be set before enabling the channel. This immediately affects the
channel output level. Changes on channel polarity are not taken into account while the channel
is enabled.
• CDTY = CPRD and CPOL = 0
• CDTY = 0 and CPOL = 1
• CDTY = 0 and CPOL = 0
• CDTY = CPRD and CPOL = 1
6120H–ATARM–17-Feb-09