AT91SAM7X256B-CU Atmel, AT91SAM7X256B-CU Datasheet - Page 44

IC MCU 256KB FLASH 100TFBGA

AT91SAM7X256B-CU

Manufacturer Part Number
AT91SAM7X256B-CU
Description
IC MCU 256KB FLASH 100TFBGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM7X256B-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
91S
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
CAN, Ethernet, SPI, I2S, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
62
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Package
100TFBGA
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
On-chip Adc
8-chx10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7X256B-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91SAM7X256B-CU-999
Manufacturer:
Atmel
Quantity:
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44
AT91SAM7X512/256/128 Preliminary
Stack Pointer (ARM Register 13). Further instructions allow limited access to the ARM registers
8 to 15.
Table 11-3
Table 11-3.
Mnemonic
MOV
ADD
SUB
CMP
TST
AND
EOR
LSL
ASR
MUL
B
BX
LDR
LDRH
LDRB
LDRSH
LDMIA
PUSH
gives the Thumb instruction mnemonic list.
Operation
Move
Add
Subtract
Compare
Test
Logical AND
Logical Exclusive OR
Logical Shift Left
Arithmetic Shift Right
Multiply
Branch and Exchange
Load Word
Load Half Word
Load Byte
Load Signed Halfword
Load Multiple
Push Register to stack
Thumb Instruction Mnemonic List
Branch
SWI
Mnemonic
MVN
ADC
SBC
CMN
NEG
BIC
ORR
LSR
ROR
BL
STR
STRH
STRB
LDRSB
STMIA
POP
Operation
Move Not
Add with Carry
Subtract with Carry
Compare Negated
Negate
Bit Clear
Logical (inclusive) OR
Logical Shift Right
Rotate Right
Branch and Link
Software Interrupt
Store Word
Store Half Word
Store Byte
Load Signed Byte
Store Multiple
Pop Register from stack
6120H–ATARM–17-Feb-09

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