AT91SAM7X256B-CU Atmel, AT91SAM7X256B-CU Datasheet - Page 447

IC MCU 256KB FLASH 100TFBGA

AT91SAM7X256B-CU

Manufacturer Part Number
AT91SAM7X256B-CU
Description
IC MCU 256KB FLASH 100TFBGA
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM7X256B-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
91S
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
CAN, Ethernet, SPI, I2S, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
62
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Package
100TFBGA
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
On-chip Adc
8-chx10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7X256B-CU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91SAM7X256B-CU-999
Manufacturer:
Atmel
Quantity:
10 000
34. USB Device Port (UDP)
34.1
Table 34-1.
Note:
6120H–ATARM–17-Feb-09
Endpoint Number
0
1
2
3
4
5
Overview
1. The Dual-Bank function provides two banks for an endpoint. This feature is used for ping-pong mode.
USB Endpoint Description
Mnemonic
The USB Device Port (UDP) is compliant with the Universal Serial Bus (USB) V2.0 full-speed
device specification.
Each endpoint can be configured in one of several USB transfer types. It can be associated with
one or two banks of a dual-port RAM used to store the current data payload. If two banks are
used, one DPR bank is read or written by the processor, while the other is read or written by the
USB device peripheral. This feature is mandatory for isochronous endpoints. Thus the device
maintains the maximum bandwidth (1M bytes/s) by working with endpoints with two banks of
DPR.
Suspend and resume are automatically detected by the USB device, which notifies the proces-
sor by raising an interrupt. Depending on the product, an external signal can be used to send a
wake up to the USB host controller.
EP0
EP1
EP2
EP3
EP4
EP5
Dual-Bank
Yes
Yes
Yes
Yes
No
No
AT91SAM7X512/256/128 Preliminary
(1)
Max. Endpoint Size
256
256
64
64
64
8
Control/Bulk/Interrupt
Control/Bulk/Interrupt
Bulk/Iso/Interrupt
Bulk/Iso/Interrupt
Bulk/Iso/Interrupt
Bulk/Iso/Interrupt
Endpoint Type
447

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