LPC2470FET208,551 NXP Semiconductors, LPC2470FET208,551 Datasheet - Page 247
LPC2470FET208,551
Manufacturer Part Number
LPC2470FET208,551
Description
IC ARM7 MCU LCD 208-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FET208,551
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4362
935284071551
LPC2470FET208-S
935284071551
LPC2470FET208-S
Available stocks
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Quantity
Price
Company:
Part Number:
LPC2470FET208,551
Manufacturer:
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Quantity:
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Part Number:
LPC2470FET208,551
Manufacturer:
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9. Ethernet block functional description
UM10237_4
User manual
9.1 Overview
Table 241. Transmit status information word
For multi-fragment frames, the value of the LateCollision, ExcessiveCollision,
ExcessiveDefer, Defer and CollissionCount bits in all but the last fragment in the frame will
be 0. The status of the last fragment in the frame will copy the value for these bits from the
MAC. All fragment statuses will have valid Error, NoDescriptor and Underrun bits.
This section defines the functions of the DMA capable 10/100 Ethernet MAC. After
introducing the DMA concepts of the Ethernet block, and a description of the basic
transmit and receive functions, this section elaborates on advanced features such as flow
control, receive filtering, etc.
The Ethernet block can transmit and receive Ethernet packets from an off-chip Ethernet
PHY connected through the MII or RMII interface. MII or RMII mode can be selected from
software.
Typically during system start-up, the Ethernet block will be initialized. Software
initialization of the Ethernet block should include initialization of the descriptor and status
arrays as well as the receiver fragment buffers.
To transmit a packet the software driver has to set up the appropriate Control registers
and a descriptor to point to the packet data buffer before transferring the packet to
hardware by incrementing the TxProduceIndex register. After transmission, hardware will
increment TxConsumeIndex and optionally generate an interrupt.
The hardware will receive packets from the PHY and apply filtering as configured by the
software driver. While receiving a packet the hardware will read a descriptor from memory
to find the location of the associated receiver data buffer. Receive data is written in the
Bit
20:0
24:21 CollisionCount
25
26
27
28
29
30
31
Symbol
-
Defer
ExcessiveDefer
ExcessiveCollision Indicates this packet exceeded the maximum collision limit and was
LateCollision
Underrun
NoDescriptor
Error
Rev. 04 — 26 August 2009
Description
Unused
The number of collisions this packet incurred, up to the
Retransmission Maximum.
This packet incurred deferral, because the medium was occupied.
This is not an error unless excessive deferral occurs.
This packet incurred deferral beyond the maximum deferral limit and
was aborted.
aborted.
An Out of window Collision was seen, causing packet abort.
A Tx underrun occurred due to the adapter not producing transmit
data.
The transmit stream was interrupted because a descriptor was not
available.
An error occurred during transmission. This is a logical OR of
Underrun, LateCollision, ExcessiveCollision, and ExcessiveDefer.
Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
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