LPC2470FET208,551 NXP Semiconductors, LPC2470FET208,551 Datasheet - Page 262
LPC2470FET208,551
Manufacturer Part Number
LPC2470FET208,551
Description
IC ARM7 MCU LCD 208-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FET208,551
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4362
935284071551
LPC2470FET208-S
935284071551
LPC2470FET208-S
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UM10237_4
User manual
Fig 31. Receive Example Memory and Registers
0x7FE010EC
0x7FE010EC
0x7FE010FC
RxDescriptor
0x7FE010F0
0x7FE010F4
0x7FE010F8
0x7FE01100
0x7FE01104
0x7FE01108
1
1
1
1
descriptor array
CONTROL
CONTROL
CONTROL
CONTROL
0x7FE01409
0x7FE01411
0x7FE01419
0x7FE01325
PACKET
PACKET
PACKET
PACKET
After reset, the values of the DMA registers will be zero. During initialization, the device
driver will allocate the descriptor and status array in memory. In this example, an array of
four descriptors is allocated; the array is 4x2x4 bytes and aligned on a 4 byte address
boundary. Since the number of descriptors matches the number of statuses, the status
array consists of four elements; the array is 4x2x4 bytes and aligned on a 8 byte address
boundary. The device driver writes the base address of the descriptor array
(0xFEED B0EC) in the RxDescriptor register, and the base address of the status array
(0xFEED B1F8) in the RxStatus register. The device driver writes the number of
descriptors and statuses minus 1 (3) in the RxDescriptorNumber register. The descriptors
and statuses in the arrays need not be initialized yet.
After allocating the descriptors, a fragment buffer needs to be allocated for each of the
descriptors. Each fragment buffer can be between 1 byte and 2 k bytes. The base
address of the fragment buffer is stored in the Packet field of the descriptors. The number
of bytes in the fragment buffer is stored in the Size field of the descriptor Control word.
The Interrupt field in the Control word of the descriptor can be set to generate an interrupt
as soon as the descriptor has been filled by the receive process. In this example the
fragment buffers are 8 bytes, so the value of the Size field in the Control word of the
descriptor is set to 7. Note that in this example, the fragment buffers are actually a
7
7
7
7
FRAGMENT 0 BUFFER (8 bytes)
FRAGMENT 1 BUFFER (8 bytes)
FRAGMENT 2 BUFFER (3 bytes)
FRAGMENT 3 BUFFER (8 bytes)
Rev. 04 — 26 August 2009
fragment buffers
RxDescriptorNumber = 3
RxConsumeIndex
RxProduceIndex
0x7FE011F8
RxStatus
Chapter 11: LPC24XX Ethernet
StatusHashCRC
StatusHashCRC
StatusHashCRC
StatusHashCRC
StatusInfo
StatusInfo
StatusInfo
StatusInfo
status array
UM10237
© NXP B.V. 2009. All rights reserved.
7
7
2
7
0x7FE011F8
0x7FE01200
0x7FE01208
0x7FE01210
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