MC9S08GT32CFDE Freescale Semiconductor, MC9S08GT32CFDE Datasheet - Page 109

• Manufacturer Part Number: MC9S08GT32CFDE
• Description: IC MCU 32K FLASH 20MHZ 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08GT32CFDE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Controller Family/series: HCS08
• No. Of I/o's: 39
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• For Use With: M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.3.9
The ICG provides a fixed frequency clock output, XCLK, for use by on-chip peripherals. This output is
equal to the internal bus clock, BUSCLK, in FBE mode. In FEE mode, XCLK is equal to ICGERCLK ÷ 2
when the following conditions are met:
If the above conditions are not true, then XCLK is equal to BUSCLK.
Freescale Semiconductor
1. CLKST will not update immediately after a write to CLKS. Several bus cycles are required before CLKST updates to the new
2. The reference frequency has no effect on ICGOUT in SCM, but the reference frequency is still used in making the comparisons
3. After initial LOCK; will be ICGDCLK/2R during initial locking process and while FLL is re-locking after the MFD bits are
(CLKST)
Actual
Mode
value.
that determine the DCOS bit
changed.
SCM
(XX)
FBE
FEE
(00)
(01)
(10)
(11)
FEI
Off
•
•
(P × N) ÷ R ≥ 4 where P is determined by RANGE (see
MFD and RFD, respectively (see
LOCK = 1.
Desired
Fixed Frequency Clock
(CLKS)
Mode
SCM
(XX)
FBE
FBE
FEE
FEE
FBE
FEE
FEE
(10)
(00)
(01)
(10)
(11)
(01)
(11)
(10)
(11)
(11)
FEI
FEI
Off
Range
X
X
X
X
X
X
X
X
0
0
0
1
(f
f
f
f
f
Frequency
Reference
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
REFERENCE
f
f
f
f
ICGIRCLK
ICGIRCLK
ICGERCLK
ICGERCLK
0
0
0
0
MC9S08GB/GT Data Sheet, Rev. 2.3
/7
/7
/7
/7
Table 7-3. ICG State Table
/7
/7
(2)
(1)
(1)
(1)
Table
)
Comparison
128/f
Cycle Time
2/f
7-6).
8/f
8/f
8/f
8/f
8/f
8/f
ICGERCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGERCLK
—
—
—
—
ICGDCLK/R
ICGDCLK/R
ICGERCLK/R
ICGERCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGOUT
Table
0
0
7-5), N and R are determined by
(3)
(2)
Not switching from
CLKS = CLKST
Conditions
ERCS = 1 and
ERCS = 1 and
FBE to SCM
DCOS = 1
DCOS = 1
DCOS = 1
ERCS = 1
for
—
—
—
—
—
—
—
Functional Description
(1)
DCOS = 0 or
LOCS = 1 &
ERCS = 0
DCOS = 0
ERCS = 0
ERCS = 0
ERCS = 0
ERCS = 1
Reason
CLKS ≠
CLKST
—
—
—
—
—
—
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