MC9S08GT32CFDE Freescale Semiconductor, MC9S08GT32CFDE Datasheet - Page 239

IC MCU 32K FLASH 20MHZ 48-QFN

MC9S08GT32CFDE

Manufacturer Part Number
MC9S08GT32CFDE
Description
IC MCU 32K FLASH 20MHZ 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08GT32CFDE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Controller Family/series
HCS08
No. Of I/o's
39
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Figure 15-2
The host is asynchronous to the target so there is a 0-to-1 cycle delay from the host-generated falling edge
to where the target perceives the beginning of the bit time. Ten target BDC clock cycles later, the target
senses the bit level on the BKGD pin. Typically, the host actively drives the pseudo-open-drain BKGD pin
during host-to-target transmissions to speed up rising edges. Because the target does not drive the BKGD
pin during the host-to-target transmission period, there is no need to treat the line as an open-drain signal
during this period.
Freescale Semiconductor
SYNCHRONIZATION
PERCEIVED START
(TARGET MCU)
BDC CLOCK
UNCERTAINTY
TRANSMIT 1
TRANSMIT 0
OF BIT TIME
HOST
HOST
shows an external host transmitting a logic 1 or 0 to the BKGD pin of a target HCS08 MCU.
Figure 15-2. BDC Host-to-Target Serial Bit Timing
MC9S08GB/GT Data Sheet, Rev. 2.3
TARGET SENSES BIT LEVEL
10 CYCLES
Background Debug Controller (BDC)
EARLIEST START
OF NEXT BIT
239

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