MC9S08GT32CFDE Freescale Semiconductor, MC9S08GT32CFDE Datasheet - Page 218

IC MCU 32K FLASH 20MHZ 48-QFN

MC9S08GT32CFDE

Manufacturer Part Number
MC9S08GT32CFDE
Description
IC MCU 32K FLASH 20MHZ 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08GT32CFDE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Controller Family/series
HCS08
No. Of I/o's
39
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Inter-Integrated Circuit (IIC) Module
218
Note that the TX bit in IIC1C must correctly reflect the desired direction of transfer in master and slave
modes for the transmission to begin. For instance, if the IIC is configured for master transmit but a
master receive is desired, then reading the IIC1D will not initiate the receive.
Reading the IIC1D will return the last byte received while the IIC is configured in either master receive
or slave receive modes. The IIC1D does not reflect every byte that is transmitted on the IIC bus, nor
can software verify that a byte has been written to the IIC1D correctly by reading it back.
In master transmit mode, the first byte of data written to IIC1D following assertion of MST is used for
the address transfer and should comprise of the calling address (in bit 7–bit 1) concatenated with the
required R/W bit (in position bit 0).
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor

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