DF2378BVFQ35V Renesas Electronics America, DF2378BVFQ35V Datasheet - Page 64

• Manufacturer Part Number: DF2378BVFQ35V
• Description: IC H8S/2378 MCU FLASH 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2378BVFQ35V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 35MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 11.29 Cascaded Combinations .......................................................................................... 596
Table 11.30 PWM Output Registers and Output Pins................................................................. 599
Table 11.31 Clock Input Pins in Phase Counting Mode.............................................................. 603
Table 11.32 Up/Down-Count Conditions in Phase Counting Mode 1 ........................................ 604
Table 11.33 Up/Down-Count Conditions in Phase Counting Mode 2 ........................................ 605
Table 11.34 Up/Down-Count Conditions in Phase Counting Mode 3 ........................................ 606
Table 11.35 Up/Down-Count Conditions in Phase Counting Mode 4 ........................................ 607
Table 11.36 TPU Interrupts......................................................................................................... 610
Section 12 Programmable Pulse Generator (PPG) ............................................ 631
Table 12.1
Section 13 8-Bit Timers (TMR) ........................................................................ 653
Table 13.1
Table 13.2
Table 13.3
Table 13.4
Table 13.5
Section 14 Watchdog Timer (WDT) ................................................................. 677
Table 14.1
Table 14.2
Section 15 Serial Communication Interface (SCI, IrDA).................................. 689
Table 15.1
Table 15.2
Table 15.3
Table 15.4
Table 15.5
Table 15.6
Table 15.7
Table 15.8
Table 15.9
Table 15.10 Serial Transfer Formats (Asynchronous Mode) ...................................................... 724
Table 15.11 SSR Status Flags and Receive Data Handling......................................................... 731
Table 15.12 Settings of Bits IrCKS2 to IrCKS0 ......................................................................... 761
Table 15.13 SCI Interrupt Sources .............................................................................................. 763
Table 15.14 Interrupt Sources ..................................................................................................... 764
Rev.7.00 Mar. 18, 2009 page lxii of lxvi
REJ09B0109-0700
Pin Configuration .................................................................................................... 633
Pin Configuration .................................................................................................... 655
Clock Input to TCNT and Count Condition ............................................................ 658
8-Bit Timer Interrupt Sources ................................................................................. 669
Timer Output Priorities ........................................................................................... 673
Switching of Internal Clock and TCNT Operation.................................................. 674
Pin Configuration .................................................................................................... 678
WDT Interrupt Source............................................................................................. 684
Pin Configuration .................................................................................................... 692
Relationships between N Setting in BRR and Bit Rate B ....................................... 711
BRR Settings for Various Bit Rates (Asynchronous Mode) ................................... 712
Maximum Bit Rate for Each Frequency (Asynchronous Mode) ............................. 715
Maximum Bit Rate with External Clock Input (Asynchronous Mode)................... 716
BRR Settings for Various Bit Rates (Clocked Synchronous Mode) ....................... 717
Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode)....... 718
Examples of Bit Rate for Various BRR Settings (Smart Card Interface Mode)
(when n = 0 and S = 372) ........................................................................................ 718
Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode)
(when S = 372) ........................................................................................................ 719