DF2378BVFQ35V Renesas Electronics America, DF2378BVFQ35V Datasheet - Page 791

IC H8S/2378 MCU FLASH 144-LQFP

DF2378BVFQ35V

Manufacturer Part Number
DF2378BVFQ35V
Description
IC H8S/2378 MCU FLASH 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2378BVFQ35V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
35MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DF2378BVFQ35V
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
DF2378BVFQ35V
Manufacturer:
Renesas Electronics America
Quantity:
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15.4
Figure 15.2 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by transfer data, a parity bit, and finally stop bits (high level). In
asynchronous serial communication, the transmission line is usually held in the mark state (high
level). The SCI monitors the transmission line, and when it goes to the space state (low level),
recognizes a start bit and starts serial communication. In asynchronous serial communication, the
communication line is usually held in the mark state (high level). The SCI monitors the
communication line, and when it goes to the space state (low level), recognizes a start bit and
starts serial communication. Inside the SCI, the transmitter and receiver are independent units,
enabling full-duplex communication. Both the transmitter and the receiver also have a double-
buffered structure, so that data can be read or written during transmission or reception, enabling
continuous data transfer.
15.4.1
Table 15.10 shows the data transfer formats that can be used in asynchronous mode. Any of 12
transfer formats can be selected according to the SMR setting. For details on the multiprocessor
bit, refer to section 15.5, Multiprocessor Communication Function.
Serial
data
1
Operation in Asynchronous Mode
Data Transfer Format
Start
bit
1 bit
0
LSB
Figure 15.2 Data Format in Asynchronous Communication
D0
One unit of transfer data (character or frame)
(Example with 8-Bit Data, Parity, Two Stop Bits)
D1
D2
Transmit/receive data
D3
7 or 8 bits
D4
Section 15 Serial Communication Interface (SCI, IrDA)
D5
D6
Rev.7.00 Mar. 18, 2009 page 723 of 1136
MSB
D7
Parity
bit
1 bit,
or none
0/1
Stop bit(s)
1
1 or
2 bits
1
REJ09B0109-0700
Idle state
(mark state)
1

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