DF2378BVFQ35V Renesas Electronics America, DF2378BVFQ35V Datasheet - Page 725

IC H8S/2378 MCU FLASH 144-LQFP

DF2378BVFQ35V

Manufacturer Part Number
DF2378BVFQ35V
Description
IC H8S/2378 MCU FLASH 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2378BVFQ35V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
35MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
Part Number:
DF2378BVFQ35V
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
DF2378BVFQ35V
Manufacturer:
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Quantity:
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13.3.4
TCR selects the clock source and the time at which TCNT is cleared, and controls interrupts.
Bit
7
6
5
4
3
2
1
0
CMIEB
CMIEA
OVIE
CCLR1
CCLR0
CKS2
CKS1
CKS0
Bit Name
Timer Control Register (TCR)
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Compare Match Interrupt Enable B
Selects whether CMFB interrupt requests
(CMIB) are enabled or disabled when the CMFB
flag in TCSR is set to 1.
0: CMFB interrupt requests (CMIB) are disabled
1: CMFB interrupt requests (CMIB) are enabled
Compare Match Interrupt Enable A
Selects whether CMFA interrupt requests
(CMIA) are enabled or disabled when the CMFA
flag in TCSR is set to 1.
0: CMFA interrupt requests (CMIA) are disabled
1: CMFA interrupt requests (CMIA) are enabled
Timer Overflow Interrupt Enable
Selects whether OVF interrupt requests (OVI)
are enabled or disabled when the OVF flag in
TCSR is set to 1.
0: OVF interrupt requests (OVI) are disabled
1: OVF interrupt requests (OVI) are enabled
Counter Clear 1 and 0
These bits select the method by which TCNT is
cleared.
00: Clearing is disabled
01: Clear by compare match A
10: Clear by compare match B
11: Clear by rising edge of external reset input
Clock Select 2 to 0
These bits select the clock input to TCNT and
count condition. See table 13.2.
Rev.7.00 Mar. 18, 2009 page 657 of 1136
Section 13 8-Bit Timers (TMR)
REJ09B0109-0700

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