HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 219

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

In the address field, bits [31:24] have the value H'F1 indicating the IC data array, and the entry is
specified by bits [12:5]. CCR.IIX has no effect on this entry specification. Address field bits [4:2]
are used for the longword data specification in the entry. As only longword access is used, 0
should be specified for address field bits [1:0].
The data field is used for the longword data specification.
The following two kinds of operation can be used on the IC data array:
1. IC data array read
2. IC data array write
4.5.3
The OC address array is allocated to addresses H'F400 0000 to H'F4FF FFFF in the P4 area. An
address array access requires a 32-bit address field specification (when reading or writing) and a
32-bit data field specification. The entry to be accessed is specified in the address field, and the
write tag, U bit, and V bit are specified in the data field.
In the address field, bits [31:24] have the value H'F4 indicating the OC address array, and the
entry is specified by bits [13:5]. CCR.OIX and CCR.ORA have no effect on this entry
specification. The address array bit [3] association bit (A bit) specifies whether or not association
Legend:
L: Longword specification bits
Address field
Longword data is read into the data field from the data specified by the longword specification
bits in the address field in the IC entry corresponding to the entry set in the address field.
The longword data specified in the data field is written for the data specified by the longword
specification bits in the address field in the IC entry corresponding to the entry set in the
address field.
Data field
: Reserved bits (0 write value, undefined read value)
OC Address Array
31
31
1 1 1 1 0 0 0 1
Figure 4.9 Memory-Mapped IC Data Array
24
23
Longword data
Rev.7.00 Oct. 10, 2008 Page 133 of 1074
13
12
Entry
REJ09B0366-0700
Section 4 Caches
5 4
L
2 1 0
0