HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 62

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

20.4 User Break Debug Support Function ................................................................................ 872
20.5 Examples of Use ............................................................................................................... 874
20.6 User Break Controller Stop Function................................................................................ 876
Section 21 High-performance User Debug Interface (H-UDI)
21.1 Overview........................................................................................................................... 879
21.2 Register Descriptions ........................................................................................................ 883
21.3 Operation .......................................................................................................................... 891
21.4 Usage Notes ...................................................................................................................... 893
Section 22 Electrical Characteristics
22.1 Absolute Maximum Ratings ............................................................................................. 895
22.2 DC Characteristics ............................................................................................................ 896
22.3 AC Characteristics ............................................................................................................ 920
Rev.7.00 Oct. 10, 2008 Page lx of lxxxiv
REJ09B0366-0700
20.3.6 Condition Match Flag Setting .............................................................................. 868
20.3.7 Program Counter (PC) Value Saved .................................................................... 868
20.3.8 Contiguous A and B Settings for Sequential Conditions ..................................... 869
20.3.9 Usage Notes ......................................................................................................... 870
20.6.1 Transition to User Break Controller Stopped State.............................................. 876
20.6.2 Cancelling the User Break Controller Stopped State ........................................... 876
20.6.3 Examples of Stopping and Restarting the User Break Controller........................ 877
21.1.1 Features................................................................................................................ 879
21.1.2 Block Diagram..................................................................................................... 879
21.1.3 Pin Configuration................................................................................................. 881
21.1.4 Register Configuration......................................................................................... 882
21.2.1 Instruction Register (SDIR) ................................................................................. 883
21.2.2 Data Register (SDDR) ......................................................................................... 885
21.2.3 Bypass Register (SDBPR) ................................................................................... 885
21.2.4 Interrupt Source Register (SDINT) (SH7750R Only).......................................... 886
21.2.5 Boundary Scan Register (SDBSR) (SH7750R Only) .......................................... 887
21.3.1 TAP Control......................................................................................................... 891
21.3.2 H-UDI Reset ........................................................................................................ 892
21.3.3 H-UDI Interrupt ................................................................................................... 892
21.3.4 Boundary Scan (EXTEST, SAMPLE/PRELOAD, BYPASS)
22.3.1 Clock and Control Signal Timing ........................................................................ 922
22.3.2 Control Signal Timing ......................................................................................... 946
22.3.3 Bus Timing .......................................................................................................... 950
22.3.4 Peripheral Module Signal Timing...................................................................... 1003
22.3.5 AC Characteristic Test Conditions .................................................................... 1015
(SH7750R Only) .................................................................................................. 893
............................................................................. 895
.............................. 879