HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 797

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

In serial transmission, the SCI operates as described below.
1. The SCI monitors the TDRE flag in SCSSR1. When TDRE is cleared to 0, the SCI recognizes
2. After transferring data from SCTDR1 to SCTSR1, the SCI sets the TDRE flag to 1 and starts
3. The SCI checks the TDRE flag at the timing for sending the MSB (bit 7).
4. After completion of serial transmission, the SCK pin is fixed high.
Figure 15.20 shows an example of SCI operation in transmission.
that data has been written to SCTDR1, and transfers the data from SCTDR1 to SCTSR1.
transmission. If the TIE bit is set to 1 at this time, a transmit-data-empty interrupt (TXI)
request is generated.
When clock output mode has been set, the SCI outputs 8 serial clock pulses. When use of an
external clock has been specified, data is output synchronized with the input clock.
The serial transmit data is sent from the TxD pin starting with the LSB (bit 0) and ending with
the MSB (bit 7).
If the TDRE flag is cleared to 0, data is transferred from SCTDR1 to SCTSR1, and serial
transmission of the next frame is started.
If the TDRE flag is set to 1, the TEND flag in SCSSR1 is set to 1, the MSB (bit 7) is sent, and
the TxD pin maintains its state.
If the TEIE bit in SCSCR1 is set to 1 at this time, a transmit-end interrupt (TEI) request is
generated.
Section 15 Serial Communication Interface (SCI)
Rev.7.00 Oct. 10, 2008 Page 711 of 1074
REJ09B0366-0700