HD6417750RF200DV Renesas Electronics America, HD6417750RF200DV Datasheet - Page 852

• Manufacturer Part Number: HD6417750RF200DV
• Description: MPU 1.5/3.3V 0K I-TEMP PB-FREE 2
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF200DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 16 Serial Communication Interface with FIFO (SCIF)
Rev.7.00 Oct. 10, 2008 Page 766 of 1074
REJ09B0366-0700
No
No
No
No
Read receive data in SCFRDR2
and ORER flag in SCLSR2, to 0
Clear DR, ER, BRK flags
Overrun error handling
Receive error handling
Break handling
Figure 16.10 Sample Serial Reception Flowchart (2)
Error handling
in SCFSR2,
ORER = 1?
BRK = 1?
ER = 1?
DR = 1?
End
Yes
Yes
Yes
Yes
1. Whether a framing error or parity error
2. When a break signal is received,
has occurred that is to be read from
SCFRDR2 can be ascertained from
the FER and PER bits in SCFSR2.
receive data is not transferred to
SCFRDR2 while the BRK flag is set.
However, note that the last data in
SCFRDR2 is H'00 (the break data in
which a framing error occurred is
stored).