UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 11

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

CHAPTER 4 PORT FUNCTIONS........................................................................................................... 83
CHAPTER 5 CLOCK GENERATOR .................................................................................................... 110
3.3 Instruction Address Addressing ................................................................................................ 71
3.4 Operand Address Addressing .................................................................................................... 74
4.1 Port Functions .............................................................................................................................. 83
4.2 Port Configuration ....................................................................................................................... 85
4.3 Registers Controlling Port Function ........................................................................................ 105
4.4 Port Function Operations.......................................................................................................... 109
5.1 Functions of Clock Generator................................................................................................... 110
5.2 Configuration of Clock Generator ............................................................................................ 110
5.3 Registers Controlling Clock Generator ................................................................................... 112
5.4 System Clock Oscillator ............................................................................................................ 119
5.5 Clock Generator Operation ....................................................................................................... 123
3.3.1 Relative addressing............................................................................................................................71
3.3.2 Immediate addressing........................................................................................................................72
3.3.3 Table indirect addressing ...................................................................................................................73
3.3.4 Register addressing ...........................................................................................................................73
3.4.1 Implied addressing .............................................................................................................................74
3.4.2 Register addressing ...........................................................................................................................75
3.4.3 Direct addressing ...............................................................................................................................76
3.4.4 Short direct addressing ......................................................................................................................77
3.4.5 Special function register (SFR) addressing........................................................................................78
3.4.6 Register indirect addressing...............................................................................................................79
3.4.7 Based addressing ..............................................................................................................................80
3.4.8 Based indexed addressing.................................................................................................................81
3.4.9 Stack addressing................................................................................................................................82
4.2.1 Port 0 .................................................................................................................................................86
4.2.2 Port 1 .................................................................................................................................................90
4.2.3 Port 2 .................................................................................................................................................95
4.2.4 Port 3 .................................................................................................................................................96
4.2.5 Port 4 .................................................................................................................................................98
4.2.6 Port 5 .................................................................................................................................................99
4.2.7 Port 6 ...............................................................................................................................................100
4.2.8 Port 7 ...............................................................................................................................................101
4.2.9 Port 12 .............................................................................................................................................102
4.2.10 Port 13 ...........................................................................................................................................103
4.2.11 Port 14 ...........................................................................................................................................104
4.4.1 Writing to I/O port .............................................................................................................................109
4.4.2 Reading from I/O port.......................................................................................................................109
4.4.3 Operations on I/O port......................................................................................................................109
5.4.1 High-speed system clock oscillator ..................................................................................................119
5.4.2 Subsystem clock oscillator ...............................................................................................................119
5.4.3 When subsystem clock is not used ..................................................................................................122
5.4.4 Internal oscillator ..............................................................................................................................122
5.4.5 Prescaler..........................................................................................................................................122
User’s Manual U16899EJ3V0UD
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