UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 381

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
(2) STOP mode
set are held. The I/O port output latches and output buffer statuses are also held.
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode is
Cautions 1. STOP mode can be used only when CPU is operating on the high-speed system clock or
STOP instruction execution sets the STOP mode. In the STOP mode, the high-speed system clock oscillator
stops, stopping the whole system, thereby considerably reducing the CPU operating current.
Because this mode can be released by an interrupt request, it enables intermittent operations to be carried out.
However, because a wait time is required to secure the oscillation stabilization time after the STOP mode is
released, select the HALT mode if it is necessary to start processing immediately upon interrupt request
generation.
2. When shifting to the STOP mode, be sure to stop the peripheral hardware operation before
3. The following sequence is recommended for operating current reduction of the A/D converter
4. If the internal oscillator is operating before the STOP mode is set, oscillation of the internal
internal oscillation clock. HALT mode can be used when CPU is operating on the high-speed
system clock, internal oscillation clock, or subsystem clock.
instruction is executed during internal oscillation clock operation, the high-speed system
clock oscillator stops, but internal oscillator does not stop.
executing STOP instruction.
when the standby function is used: First clear bit 7 (ADCS) of the A/D converter mode
register (ADM) to 0 to stop the A/D conversion operation, and then execute the HALT or STOP
instruction.
oscillation clock cannot be stopped in the STOP mode.
oscillation clock is used as the CPU clock, the CPU operation is stopped for 17/f
STOP mode is released.
CHAPTER 19 STANDBY FUNCTION
User’s Manual U16899EJ3V0UD
However, when the internal
However, when the STOP
R
(s) after
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