UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 143

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

(1) TI00n pin valid edge selected as capture trigger (CRC0n1 = 1, CRC0n0 = 1)
(2) TI01n pin valid edge selected as capture trigger (CRC0n1 = 0, CRC0n0 = 1)
Remarks 1. Setting ES0n1, ES0n0 = 1, 0 and ES1n1, ES1n0 = 1, 0 is prohibited.
Falling edge
Rising edge
No capture operation
Falling edge
Rising edge
Both rising and falling edges
Cautions 1. Set a value other than 0000H in CR00n in the mode in which clear & start occurs on a match
3. n = 0:
CR00n Capture Trigger
CR00n Capture Trigger
2. ES0n1, ES0n0:
ES1n1, ES1n0:
CRC0n1, CRC0n0: Bits 1 and 0 of capture/compare control register 0n (CRC0n)
n = 0, 1:
2. If CR00n is cleared to 0000H in the free-running mode and in the clear mode using the valid
3. When the valid edge of the TI01n pin is used, P01 or P06 cannot be used as the timer output
4. When CR00n is used as a capture register, read data is undefined if the register read time
5. Do not rewrite CR00n during TM0n operation.
Table 6-2. CR00n Capture Trigger and Valid Edges of TI00n and TI01n Pins
of TM0n and CR00n.
edge of the TI00n pin, an interrupt request (INTTM00n) is generated when the value of
CR00n changes from 0000H to 0001H following TM0n overflow (FFFFH).
INTTM00n is generated after a match between TM0n and CR00n, after detecting the valid
edge of the TI01n pin, or the timer is cleared by a one-shot trigger.
pin (TO0n). When P01 or P06 is used as the TO0n pin, the valid edge of the TI01n pin
cannot be used.
and capture trigger input conflict (the capture data itself is the correct value). If a timer
count stop and a capture trigger input conflict, the captured data is undefined.
PD78F0132H
PD78F0133H, 78F0134H, 78F0136H, 78F0138H, 78F0138HD
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Bits 5 and 4 of prescaler mode register 0n (PRM0n)
Bits 7 and 6 of prescaler mode register 0n (PRM0n)
Rising edge
Falling edge
Both rising and falling edges
Falling edge
Rising edge
Both rising and falling edges
User’s Manual U16899EJ3V0UD
TI00n Pin Valid Edge
TI01n Pin Valid Edge
ES0n1
ES1n1
0
0
1
0
0
1
In addition,
ES0n0
ES1n0
1
0
1
0
1
1
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