UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 111

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
4.4 Port Function Operations
4.4.1 Writing to I/O port
(1) Output mode
(2) Input mode
4.4.2 Reading from I/O port
(1) Output mode
(2) Input mode
4.4.3 Operations on I/O port
(1) Output mode
(2) Input mode
Port operations differ depending on whether the input or output mode is set, as shown below.
Caution In the case of 1-bit memory manipulation instruction, although a single bit is manipulated, the
A value is written to the output latch by a transfer instruction, and the output latch contents are output from the
pin.
Once data is written to the output latch, it is retained until data is written to the output latch again.
The data of the output latch is cleared by reset.
A value is written to the output latch by a transfer instruction, but since the output buffer is off, the pin status does
not change.
Once data is written to the output latch, it is retained until data is written to the output latch again.
The output latch contents are read by a transfer instruction. The output latch contents do not change.
The pin status is read by a transfer instruction. The output latch contents do not change.
An operation is performed on the output latch contents, and the result is written to the output latch. The output
latch contents are output from the pins.
Once data is written to the output latch, it is retained until data is written to the output latch again.
The data of the output latch is cleared by reset.
The pin level is read and an operation is performed on its contents. The result of the operation is written to the
output latch, but since the output buffer is off, the pin status does not change.
port is accessed as an 8-bit unit. Therefore, on a port with a mixture of input and output pins, the
output latch contents for pins specified as input are undefined, even for bits other than the
manipulated bit.
CHAPTER 4 PORT FUNCTIONS
User’s Manual U16899EJ3V0UD
109

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