UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 405

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

operation. When CLME is set to 1 by software at the end of the oscillation stabilization time (reset value of OSTS
register is 05H (2
automatically starts at the end of the high-speed system clock oscillation stabilization time. Monitoring is stopped in
STOP mode and during the oscillation stabilization time.
Internal oscillation clock
Internal oscillation clock
(CLME = 1 is set after RESET input and at the end of high-speed system clock oscillation stabilization time)
(CLME = 1 is set when CPU clock operates on high-speed system clock and before entering STOP mode)
RESET input clears bit 0 (CLME) of the clock monitor mode register (CLM) to 0 and stops the clock monitor
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to 1 before entering STOP mode, monitoring
Clock monitor status
Clock monitor status
CPU operation
CPU operation
system clock
system clock
High-speed
(CPU clock)
High-speed
RESET
CLME
16
CLME
/f
XP
)) of the high-speed system clock, monitoring is started.
Monitoring
operation
Normal
operation
Normal
Monitoring
(4) Clock monitor status after STOP mode is released
(3) Clock monitor status after RESET input
Figure 21-3. Timing of Clock Monitor (2/4)
Reset
Oscillation
stopped
STOP
CHAPTER 21 CLOCK MONITOR
User’s Manual U16899EJ3V0UD
Monitoring stopped
Clock supply
Oscillation stabilization time
17 clocks
Oscillation stabilization time
(time set by OSTS register)
stopped
Monitoring stopped
Oscillation stabilization time
Normal operation (internal oscillation clock)
Normal operation
Monitoring
Set to 1 by software
Monitoring
403