UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 248

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
11.4 Clock Output/Buzzer Output Controller Operations
11.4.1 Clock output operation
11.4.2 Operation as buzzer output
246
(2) Port mode register 14 (PM14)
The clock pulse is output as the following procedure.
<1> Select the clock pulse output frequency with bits 0 to 3 (CCS0 to CCS3) of the clock output selection register
<2> Set bit 4 (CLOE) of CKS to 1 to enable clock output.
Remark
The buzzer frequency is output as the following procedure.
<1> Select the buzzer output frequency with bits 5 and 6 (BCS0, BCS1) of the clock output selection register
<2> Set bit 7 (BZOE) of CKS to 1 to enable buzzer output.
This register sets port 14 input/output in 1-bit units.
When using the P140/INTP6/PCL pin for clock output and the P141/INTP7/BUZ pin for buzzer output, set
PM140, PM141 and the output latch of P140, P141 to 0.
PM14 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets PM14 to FFH.
(CKS) (clock pulse output in disabled status).
(CKS) (buzzer output in disabled status).
Clock output
The clock output controller is designed not to output pulses with a small width during output
enable/disable switching of the clock output. As shown in Figure 11-4, be sure to start output from the
low period of the clock (marked with * in the figure). When stopping output, do so after securing high
level of the clock.
CLOE
Address: FF2EH
Symbol
PM14
CHAPTER 11 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
PM14n
Figure 11-4. Remote Control Output Application Example
*
7
1
0
1
Figure 11-3. Format of Port Mode Register 14 (PM14)
After reset: FFH
Output mode (output buffer on)
Input mode (output buffer off)
6
1
User’s Manual U16899EJ3V0UD
5
1
P14n pin I/O mode selection (n = 0, 1)
R/W
4
1
3
1
*
2
1
PM141
1
PM140
0

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