UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 305

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
(6) Asynchronous serial interface control register 6 (ASICL6)
Address: FF58H After reset: 16H R/W
ASICL6
Note Bit 7 is read-only.
Symbol
This register controls the serial communication operations of serial interface UART6.
ASICL6 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to 16H.
Caution ASICL6 can be refreshed (the same value is written) by software during a communication
Figure 14-10. Format of Asynchronous Serial Interface Control Register 6 (ASICL6) (1/2)
operation (when bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 = 1 or bit 7 (POWER6) and bit 5
(RXE6) of ASIM6 = 1). Note, however, that communication is started by the refresh operation
because bit 6 (SBRT6) of ASICL6 is cleared to 0 when communication is completed (when an
interrupt signal is generated).
SBRF6
SBRF6
SBRT6
SBTT6
<7>
0
1
0
1
0
1
If POWER6 = 0 and RXE6 = 0 or if SBF reception has been completed correctly
SBF reception in progress
SBF reception trigger
SBF transmission trigger
SBRT6
<6>
Note
CHAPTER 14 SERIAL INTERFACE UART6
SBTT6
5
User’s Manual U16899EJ3V0UD
SBL62
4
SBF reception status flag
SBF transmission trigger
SBF reception trigger
SBL61
3
SBL60
2
DIR6
1
TXDLV6
0
303

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