UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 175
UPD78F0138HGK-9ET-A
Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet
1.UPD78F0138HGK-9ET-A.pdf
(568 pages)
Specifications of UPD78F0138HGK-9ET-A
Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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6.4.6 One-shot pulse output operation
trigger (TI00n pin input).
(1) One-shot pulse output with software trigger
16-bit timer/event counter 0n can output a one-shot pulse in synchronization with a software trigger or an external
The basic operation setting procedure is as follows.
<1> Set the count clock by using the PRM0n register.
<2> Set the CRC0n register (see Figures 6-36 and 6-38 for the set value).
<3> Set the TOC0n register (see Figures 6-36 and 6-38 for the set value).
<4> Set any value to the CR00n and CR01n registers (0000H cannot be set).
<5> Set the TMC0n register to start the operation (see Figures 6-36 and 6-38 for the set value).
Remarks 1. For the setting of the TO0n pin, see 6.3 (5) Port mode register 0 (PM0).
Setting
A one-shot pulse can be output from the TO0n pin by setting 16-bit timer mode control register 0n (TMC0n),
capture/compare control register 0n (CRC0n), and 16-bit timer output control register 0n (TOC0n) as shown in
Figure 6-36, and by setting bit 6 (OSPT0n) of the TOC0n register to 1 by software.
By setting the OSPT0n bit to 1, 16-bit timer/event counter 0n is cleared and started, and its output becomes
active at the count value (N) set in advance to 16-bit timer capture/compare register 01n (CR01n). After that, the
output becomes inactive at the count value (M) set in advance to 16-bit timer capture/compare register 00n
(CR00n)
Even after the one-shot pulse has been output, the TM0n register continues its operation. To stop the TM0n
register, the TMC0n3 and TMC0n2 bits of the TMC0n register must be set to 00.
Note The case where N < M is described here. When N > M, the output becomes active with the CR00n register
Cautions 1. Do not set the OSPT0n bit to 1 while the one-shot pulse is being output. To output the one-
Remark n = 0:
and inactive with the CR01n register. Do not set N to M.
Note
2. For how to enable the INTTM00n (if necessary, INTTM01n) interrupt, see CHAPTER 17
n = 0, 1: PD78F0133H, 78F0134H, 78F0136H, 78F0138H, 78F0138HD
2. When using the one-shot pulse output of 16-bit timer/event counter 0n with a software
.
INTERRUPT FUNCTIONS.
shot pulse again, wait until the current one-shot pulse output is completed.
trigger, do not change the level of the TI00n pin or its alternate-function port pin.
Because the external trigger is valid even in this case, the timer is cleared and started even
at the level of the TI00n pin or its alternate-function port pin, resulting in the output of a
pulse at an undesired timing.
PD78F0132H
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
User’s Manual U16899EJ3V0UD
173
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