UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 357

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UPD78F0138HGK-9ET-A

Manufacturer Part Number
UPD78F0138HGK-9ET-A
Description
MCU 8BIT 60K FLASH 64TQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx1+r
Datasheet

Specifications of UPD78F0138HGK-9ET-A

Core Processor
78K/0
Core Size
8-Bit
Speed
16MHz
Connectivity
3-Wire SIO, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
42
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
16.4.2 Division operation
1. Set operation data to multiplication/division data register A0 (MDA0L and MDA0H) and multiplication/division
2. Set bits 0 (DMUSEL0) and 7 (DMUE) of multiplier/divider control register 0 (DMUC0) to 0 and 1, respectively.
3. The operation will be completed when 32 internal clocks have been issued after the start of the operation
4. The result data is stored in the MDA0L, MDA0H, and SDR0 registers.
5. DMUE is cleared to 0 (end of operation).
6. After the operation, an interrupt request signal (INTDMU) is generated.
7. To execute multiplication next, start from the initial setting in 16.4.1 Multiplication operation.
8. To execute division next, start from the initial setting in 16.4.2 Division operation.
Initial setting
During operation
End of operation
Next operation
data register B0 (MDB0).
Operation will start.
(intermediate data is stored in the MDA0L and MDA0H registers and remainder data register 0 (SDR0) during
operation, and therefore the read values of these registers are not guaranteed).
CHAPTER 16 MULTIPLIER/DIVIDER
User’s Manual U16899EJ3V0UD
355

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