UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 521

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

33.2 Peripheral Hardware That Generates Wait
clocks.
Note No wait cycle is generated for the CPU if the number of wait clocks calculated by the above expression is 1.
Caution When the CPU is operating on the subsystem clock and the high-speed system clock is stopped
Remark The clock is the CPU clock (f
Watchdog timer
Serial interface UART0
Serial interface UART6
A/D converter
Table 33-1 lists the registers that issue a wait request when accessed by the CPU, and the number of CPU wait
Peripheral Hardware
(MCC = 1), do not access the registers listed above using an access method in which a wait request
is issued.
Table 33-1. Registers That Generate Wait and Number of CPU Wait Clocks
*The result after the decimal point is truncated if it is less than t
WDTM
ASIS0
ASIS6
ADM
ADS
PFM
PFT
ADCR
<Calculating maximum number of wait clocks>
{(1/f
(1/f
f
f
t
MACRO
CPU
CPUL
CPU
:
MACRO
:
:
), and is rounded up if it exceeds t
Register
)
Macro operating frequency
(When bit 5 (FR2) of ADM = “1”: f
CPU clock frequency
Low-level width of CPU clock
CPU
CHAPTER 33 CAUTIONS FOR WAIT
2/(1/f
).
CPU
User’s Manual U16899EJ3V0UD
)} + 1
Write
Read
Read
Write
Write
Write
Write
Read
Access
CPUL
X
.
/2, when bit 5 (FR2) of ADM = “0”: f
3 clocks (fixed)
1 clock (fixed)
1 clock (fixed)
2 to 5 clocks
(when ADM.5 flag = “1”)
2 to 9 clocks
(when ADM.5 flag = “0”)
1 to 5 clocks
(when ADM.5 flag = “1”)
1 to 9 clocks
(when ADM.5 flag = “0”)
CPUL
Number of Wait Clocks
after it has been multiplied by
Note
Note
X
/2
2
)
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