SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 140

• Manufacturer Part Number: SC900841JVKR2
• Description: IC POWER MGT 338-MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of SC900841JVKR2

• Applications: PC's, PDA's
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 338-TBGA
• Input Voltage: 2.8 V to 4.4 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

the voice DAC, and their sampling rates are independent.
The stereo ADC and DAC sampling rate is set by the
STRSR[3:0] bits or may optionally be automatically detected
in slave mode by setting the STRSRDET bit.
8.0, 11.025, 12, 16, 22.05, 24, 26, 32, 44.1, and 48 kHz
A/D CONVERTER
channel A/D converter with integrated filtering. The stereo
140
900841
FUNCTIONAL DEVICE OPERATION
AUDIO
Table 86. Stereo DAC Main Performance Specifications
FILTERING
Notes
Output Range
Absolute Gain
PSRR
THD+N
Dynamic Range
Signal to Noise Ratio
Intermodulation Distortion
Channel Separation
Enable Time
Pass Band
Pass Band Ripple
Stop Band
Stop Band Attenuation
Phase Linearity
25.
26.
The audio CODEC supports the sampling frequencies of
The stereo ADC is based on a 16-bit linear left and right
Input Range
Absolute Gain
PSRR
THD+N
Dynamic Range
Signal to Noise Ratio
Intermodulation Distortion
Channel Separation
Enable Time
Equivalent to +3.0 dBm0
Equivalent to 500 mVrms
Parameter
Parameter
Table 1. Stereo ADC Main Performance Specifications
0 dBFS
1.02 kHz, 0 dB gain
Relative to BP
1.02 kHz, 0 dBm0
1.02 kHz
1.02 kHz
SMTPE method 50 Hz/1020 Hz,
4:1 0 dBm0 total input level
Including filters
In pass band
0 dBFS
1.02 kHz, 0 dB gain
Relative to BP
1.02 kHz, 0 dBm0
1.02 kHz
1.02 kHz
SMTPE method 50 Hz/1020 Hz,
4:1 0 dBm0 total input level
Including filters
(25)
(27)
Condition
Condition
(26)
(28)
D/A CONVERTERS
channel D/A converter with integrated filtering. The stereo
DAC is enabled by setting the PSCNTDA bit.
ADC is enabled by setting the STRADCEN bit. If the
VCEADCEN bit is also set, it will take priority, so the ADC
converters will be used in voice mode.
The stereo DAC is based on a 24-bit linear left and right
0.4535*FS
Minimum
Minimum
-0.5
-0.5
-0.5
-15
80
90
92
94
85
Analog Integrated Circuit Device Data
Typical
Typical
100
-83
-85
90
90
90
96
2
3
2
3
Freescale Semiconductor
Maximum
Maximum
0.5465*FS
+0.5
+0.5
-75
-75
+15
-80
-75
-75
0.5
Units
dBA
dBA
dBA
dBA
Units
V
dB
dB
dB
ms
dBA
dBA
dBA
dBA
V
ms
dB
dB
dB
Hz
dB
Hz
dB
PP
°
PP