SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 38

• Manufacturer Part Number: SC900841JVKR2
• Description: IC POWER MGT 338-MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of SC900841JVKR2

• Applications: PC's, PDA's
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 338-TBGA
• Input Voltage: 2.8 V to 4.4 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 5. SC900841 Pin Description
38
900841
FUNCTIONAL DESCRIPTION
GENERAL DESCRIPTION
THERMTRIPB
VYMXGPSEN
VYMXPAEN
VYMX3GEN
Node Name
EXITSTBY
GNDCTRL
VRCOMP
PMICINT
RESETB
PWRGD
VIDEN0
VIDEN1
VID0
VID1
VID2
VID3
VID4
VID5
VID6
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
SGNL
Type
GND
I/O
O
O
O
O
-
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Ultra-mobile Platform Architecture Sideband Signals
Rating
2.5 V
2.5 V
2.5 V
2.5 V
2.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
2.5 V
2.5 V
2.5 V
-
Balls
# of
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
BGA Location
AB14
H16
C15
M16
G17
G19
C19
B16
B20
J17
D4
E5
E3
H8
E1
F4
F2
J9
J7
PMIC Interrupt. Asserted by PMIC to wake Platform
controller hub and begin communications. Level-sensitive,
read to clear.
Voltage Regulator Complete. Asserted high by the PMIC
when a SPI voltage regulation request has been decoded.
The signal is de-asserted on completion of the request (i.e.
the rail is in regulation).
Active low hard reset for Platform controller hub. When
asserted, Platform controller hub should return to its initial
default state.
POWER GOOD: SC900841 asserts this signal to indicate
that all power rails to Platform controller hub are good.
Assertion of PWRGD also means that VCCA_OSC has been
valid for at least 30 microseconds. The Platform Controller
Hub will remain “off” until this signal is asserted.
EXIT Standby. When asserted, SC900841 exits the AOAC
Standby settings for regulating the platform supplies. When
asserted SC900841 switches VRs on which are defined in
registers 0x09 through 0x0D. This is a low latency VR
context switch.
Thermal trip. Asserted by the CPU to indicate a catastrophic
thermal event.
Driven by the CPU to indicate which VR the VID bus is
addressed to (VCC or VNN). Debounced inside SC900841
for 150 ns. The CPU will hold the value for at least 300 ns.
Driven by the CPU to indicate the output voltage setting for
the VCC and VNN rails. Debounced inside SC900841 for
150 ns. The CPU will hold the value for at least 300 ns.
Enable Input signal for the VYMXGPS rail. Asserted by the
communications subsystem to enable a supply voltage with
minimal latency.
Enable Input signal for the VYMXPA rail. Asserted by the
communications subsystem to enable a supply voltage with
minimal latency.
Enable Input signal for the VYMX3G rail. Asserted by the
communications subsystem to turn on/off a supply voltage
with minimal latency.
Logic Control Ground
Analog Integrated Circuit Device Data
Pin Description
Freescale Semiconductor