SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 150

• Manufacturer Part Number: SC900841JVKR2
• Description: IC POWER MGT 338-MAPBGA
• Manufacturer: Freescale Semiconductor

Specifications of SC900841JVKR2

• Applications: PC's, PDA's
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 338-TBGA
• Input Voltage: 2.8 V to 4.4 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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900841
Table 95. Audio Registers
FUNCTIONAL DEVICE OPERATION
AUDIO
STRMODESEL
STRCLKFRQ
VCEAUDHPF
VCERXSLOT
STRSRDET
VCECLKEN
VCE2PCM2
STRMONO
VCEFSINV
STRFSINV
Reserved
Reserved
VCEDLM
STRSR
3:0
6:4
5:4
7:6
1:0
7
0
1
2
3
2
3
4
5
AUD4 (ADDR 0x183 - R/W - Default Value: 0x00)
AUD5 (ADDR 0x184 - R/W - Default Value: 0x00)
AUD6 (ADDR 0x185 - R/W - Default Value: 0x00)
Sample rate stereo ADC/DAC
x0 = 8.0 kHz
x1 = 11.025 kHz
x2 = 12 kHz
x3 = 16 kHz
x4 = 22.05 kHz
x5 = 24 kHz
Selects clock speed BCL2
x0 = 32 times FS2
x1 = 64 times FS2
x2 = 128 times FS2
x3-x7 = Reserved
Sample rate detection
x0 = Not enabled
x1 = Enabled
Voice channel digital loop back mode
x0 = normal operation
x1 = digital loop back enabled
Frame sync FS1 polarity inversion
x0 = Not inverted
x1 = Inverted
Control FS and BITCLK generation in Master mode
x0 = clk gen disabled
x1 = clk gen enabled
Voice DAC high pass filter
x0 = Disabled
x1 = Enabled
Selects which slot will be used to receive PCM data
Reserved
PCM2 mode select
x0 = I
x1 = Left-justified
x2 = Right-justified
x3 = Reserved (defaults to right-justified)
Send voice data to PCM2 when '1'
Digitally mix ADC input to both left and right channels
Reserved
Frame sync FS2 polarity inversion
x0 = Not inverted
x1 = Inverted
2
S mode
x6 = 26 kHz
x7 = 32 kHz
x8 = 44.1 kHz
x9 = 48 kHz
xA-xF = Reserved
Analog Integrated Circuit Device Data
Freescale Semiconductor