SC900841JVKR2 Freescale Semiconductor, SC900841JVKR2 Datasheet - Page 97

IC POWER MGT 338-MAPBGA

SC900841JVKR2

Manufacturer Part Number
SC900841JVKR2
Description
IC POWER MGT 338-MAPBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of SC900841JVKR2

Applications
PC's, PDA's
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
338-TBGA
Input Voltage
2.8 V to 4.4 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Voltage - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC900841JVKR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table 51. VYMXYFI and VYMXGPS Control Register Structure and Bits Description
Main Features
• Uses V15, V21, or VPWR as the main power supply
• 170 mA maximum continuous output current for the 1.8 V
• 350 mA maximum continuous output current for the 1.3 V
• Optimized for a 2.2 µF external filter capacitor with a
• Uses an internal pass FET
• The output for each LDO is monitored for over-current
VYMXYFI/VYMXGPS Status/Control Registers and Bits
Description
communication voltage rails, the Freescale Chipset uses the
AOACCTLVGYMXIO 5:3
Analog Integrated Circuit Device Data
Freescale Semiconductor
setting
setting
maximum of 10 mΩ ESR
conditions and under-voltage events
In order to minimize conductive loses in the Advance
CTLVGYMXIO
SELVGYMXIO
Name
V
OYMXGPS
V
15
Bits
, V
2:0
7:6
21
or V
C
C
OYMXGPS
VGYMXIO State Control
x0 = Reserved
x1 = Reserved
x2 = Reserved
x3 = Reserved
VGYMXIO State Control during AOAC Exit (when the Exit pin is EXITSTBY pin is asserted). These bits will be
initialized by the system SPI controller after power up
X0 = Do not copy
x1 = Do not copy
x2 = Do not copy
x3 = Do not copy
VGYMXIO output voltage selection bits
X0 = 1.8 V
x1 = 2.5 V
INYMXGPS
VOUTYMXGPS
PWR
PVINYMXGPS
GNDCOMMS1
GNDCOMMS2
Figure 49. VYMXGPS Detailed Internal Block Diagram
VGYMXIOCNT (ADDR 0x4A - R/W - Default Value: 0x24)
VYMXYFI , and VYMXGPS
Discharge
Two GND pins shared
between VYMXYFI18,
V
I
OYMXGPS
OYMXGPS
Controller
Z
Output Monitor
_
+
VYMXYFI and VYMXGP rails to supply VWDYMXA and
VGYMXIO on the Ultra-mobile platform.
voltage mapping for these signals.
Freescale will turn on that voltage rail using the right LDO,
see
Freescale LDOs
V
Figure 50. Freescale vs. Customer LDO Mapping for
When the software programs a certain voltage rail,
900841 VRs
REF
VYMXGPS
Description
VYMXYFI
Table
51.
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
x4 = OFF
x5 = Low Power
x6 = Active
x7 = Active
x2 = Reserved
x3 = Reserved
AOACCTLVWDYMXA
AOACCTLVGYMXIO
VYMXGPSFAULT
Communication Modules
CTLVWDYMXA
SELVWDYMXA
CTLVGYMXIO
SELVGYMXIO
FUNCTIONAL DEVICE OPERATION
1.2V
1.3V
1.8V
2.5V
Rail
Ultra-mobile platform VRs
Interface
SPI
Figure 50
POWER SUPPLIES
Customer LDOs
VWDYMXA
VGYMXIO
shows the
900841
97

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