IP-10GETHERNET Altera, IP-10GETHERNET Datasheet - Page 19

• Manufacturer Part Number: IP-10GETHERNET
• Description: IP CORE - 10 Gbps Ethernet MAC PCS PMA Reference Design
• Manufacturer: Altera

Specifications of IP-10GETHERNET

• Software Application: IP CORE, Interface And Protocols, ETHERNET
• Supported Families: Quartus II
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 2: Getting Started with the 10-Gbps Ethernet IP
Functional Verification
2.4.1. Testbench Files
Table 2–6. Testbench Files
2.4.2. Testbench Utilities—Tasks and Procedures
© July 2010 Altera Corporation
demo_hookup.iv
demo_hutils.iv, tb_utils.v
tb.v
demo_run_modelsim.tcl
write_avalon
Usage
Arguments
File Name
f
avalon_write(data_to_write, address_to_write)
data_to_write
address_to_write The address of the register to write.
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Table 2–6
The tb_utils.v file contains many tasks and functions to configure the components of
the testbench. This section provides a description of some important Verilog HDL
tasks. The VHDL functions are generally similar in structure and are not specifically
listed below.
2.4.2.1. Avalon-MM Tasks
These tasks read and write the configuration and MDIO registers using the
Avalon-MM protocol.
For a more information about the Avalon-MM protocol refer to the
Specifications.
write_avalon
This command creates an Avalon-MM write command. You can use it to update
registers.
Generates Ethernet frames with CRC errors
Generates frames on the Avalon-ST interface
Provides access to the IP core registers via Avalon-MM interface
Generates frames with virtual LAN (VLAN) or stacked VLAN tags
Performs MDIO reads and writes
The top-level testbench file. It includes the customized 10-Gbps Ethernet IP core which is
the device under test (DUT), a client packet generator, and a client packet checker along with
other logic blocks. This file (demo_hookup.iv) contains the DUT, packet generator, and
packet checker, along with configuration logic.
These files include various test utilities to configure the DUT, the packet generator, and the
packet checker. These utilities create tests such as tb.v.
This file includes tests that configure the testbench and transmit and receive packets via the
MAC Tx and Rx ports.
This is the simulation script that you can use to compile all files and run the test case.
describes the files that implement the testbench.
The data to write at the specified address_to_write.
Description
Getting Started with the 10-Gbps Ethernet IP
Avalon Interface
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