IP-10GETHERNET Altera, IP-10GETHERNET Datasheet - Page 72

• Manufacturer Part Number: IP-10GETHERNET
• Description: IP CORE - 10 Gbps Ethernet MAC PCS PMA Reference Design
• Manufacturer: Altera

Specifications of IP-10GETHERNET

• Software Application: IP CORE, Interface And Protocols, ETHERNET
• Supported Families: Quartus II
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

3–46
Table 3–27. ERR_FIFO_TX_DATA_ECC_2—Tx FIFO Data Errors Word 2—Offset: 0x360
Table 3–28. ERR_FIFO_TX_CTRL_ECC—Tx FIFO Control Errors—Offset: 0x364
Table 3–29. ERR_FIFO_RX_DATA_ECC_0—Rx FIFO Data Errors Word 0—Offset: 0x368
Table 3–30. ERR_FIFO_RX_DATA_ECC_1—Rx FIFO Data Errors Word 1—Offset: 0x36C
Table 3–31. ERR_FIFO_RX_DATA_ECC_2—Rx FIFO Data Errors Word 2—Offset: 0x370
Table 3–32. ERR_FIFO_RX_CTRL_ECC—Rx FIFO Control Errors—Offset: 0x374
10-Gbps Ethernet IP Functional Description
[31:8]
[7:0]
[31:13] RW
[12:0]
[31:0]
[31:0]
[31:8]
[7:0]
[31:13] RW
[12:0]
Bits
Bits
Bits
Bits
Bits
Bits
Access
RW
Access
Access
RW
Access
RW
Access
RW
Access
Reserved.
Errors inserted in bits [71:64] of the Tx FIFO data+ECC. For each bit position, the
value 1 indicates an error is inserted, and the value 0 indicates no error is inserted.
Reserved.
Errors inserted in the 13-bit Tx FIFO control+ECC. For each bit position, the value 1
indicates an error is inserted, and the value 0 indicates no error is inserted.
Errors inserted in bits [31:0] of the Rx FIFO data+ECC. For each bit position, the
value 1 indicates an error is inserted, and the value 0 indicates no error is inserted.
Errors inserted in bits [63:32] of the Rx FIFO data+ECC. For each bit position, the
value 1 indicates an error is inserted, and the value 0 indicates no error is inserted.
Reserved.
Errors inserted in bits [71:64] of the Rx FIFO data+ECC. For each bit position, the
value 1 indicates an error is inserted, and the value 0 indicates no error is inserted.
Reserved.
Errors inserted in the 13-bit Rx FIFO control+ECC. For each bit position, the value 1
indicates an error is inserted, and the value 0 indicates no error is inserted.
Function
Function
Function
Function
Function
Function
© July 2010 Altera Corporation
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Register Descriptions
HW Reset Value
HW Reset Value
HW Reset Value
HW Reset Value
HW Reset Value
HW Reset Value