ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 101

• Manufacturer Part Number: ADUC7034BCPZ-RL
• Description: IC,Battery Management,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7034BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

High Voltage Status Register
Name:
Address:
Default Value:
Access:
Function:
Table 76. HVSTA Bit Designations
Bit
7 to 6
5
4
3
2
1
0
HVSTA
Indirectly addressed via the HVCON high voltage interface
0x00
Read only, but should only be read on a high voltage interrupt
This 8-bit, read only register reflects a change of state for all the corresponding bits in the HVMON register. This register
is not an MMR and does not appear in the Complete MMR Listing section. It is indirectly accessed through the HVCON
MMR registered interface, and data is read back from this register via the HVDAT MMR. In response to a high voltage
interrupt event, the high voltage interrupt controller simultaneously and automatically loads the current value of the
high voltage status register (HVSTA) into the HVDAT register.
Description
Reserved. These bits should not be used and are reserved for future use.
PSM status. Only valid if enabled via HVCFG0[3]. This bit is not latched and the IRQ needs to be enabled to detect it.
0 = the voltage at the VDD pin stays above 6.0 V.
1 = the voltage at the VDD pin drops below 6.0 V.
WU request status bit. Only valid if enabled via HVCFG1[4]. When enabled via HVCFG1[4], this bit is set to 1 to indicate
that a rising or falling edge transition on the WU pin generated a high voltage interrupt.
Overtemperature. This bit is always enabled.
0 = a thermal shutdown event has not occurred.
1 = a thermal shutdown event has occurred. All high voltage pin drivers (LIN/BSD, WU, and STI) are automatically
disabled after a thermal shutdown occurs.
LIN/BSD short-circuit status flag.
0 = normal LIN/BSD operation. This bit is cleared automatically by reading the HVSTA register.
1 = a LIN/BSD short circuit is detected. In this condition, the LIN driver is automatically disabled.
STI short-circuit status flag.
0 = the STI driver is operating normally and is cleared automatically by reading the HVSTA register.
1 = the STI driver has experienced a short-circuit condition.
Wake-up short-circuit status flag.
0 = normal wake-up operation.
1 = a wake-up short circuit is detected.
Rev. B | Page 101 of 136
ADuC7034