ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 60

IC,Battery Management,LLCC,48PIN,PLASTIC

ADUC7034BCPZ-RL

Manufacturer Part Number
ADUC7034BCPZ-RL
Description
IC,Battery Management,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7034BCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuC7034
Understanding the Offset and Gain Calibration Registers
The output of a typical block in the ADC signal flow (described
in the ADC Sinc3 Digital Filter Response section through the
Using the Offset and Gain Calibration section) can be consid-
ered a fractional number with a span for a ±full-scale input of
approximately ±0.75. The span is less than ±1.0 because there is
attenuation in the modulator to accommodate some overrange
capacity on the input signal. The exact value of the attenuation
varies slightly from part to part because of manufacturing
tolerances.
The offset coefficient is read from the ADC0OF calibration
register and is a 16-bit, twos complement number. The range
of this number in terms of the signal chain is effectively ±1.0.
Therefore, 1 LSB of the ADC0OF register is not the same as
1 LSB of ADC0DAT.
A positive value of ADC0OF indicates that when offset is
subtracted from the output of the filter, a negative value is added.
The nominal value of this register is 0x0000, indicating zero
offset is to be removed. The actual offset of the ADC can vary
slightly from part to part and at different PGA gains. The offset
within the ADC is minimized if the chopping mode is enabled
(that is, ADCFLT[15] = 1).
The gain coefficient is read from the AD0GN register and is a
unitless scaling factor. The 16-bit value in this register is divided
by 16,384 and then multiplied by the offset-corrected value. The
nominal value of this register equals 0x5555, corresponding to a
multiplication factor of 1.3333, and scales the nominal ±0.75 signal
to produce a full-scale output signal of ±1.0. The resulting
output signal is checked for overflow/underflow and converted
to twos complement or unipolar mode before being output to
the data register.
The actual gain and the required scaling coefficient for zero
gain error varies slightly from part to part at different PGA
settings in normal and low power modes. The value downloaded
into ADC0GN at a power-on reset represents the scaling factor
for a PGA gain of 1. If a different PGA setting is used, however,
some gain error may be present. To correct this error, overwrite
the calibration coefficients via user code or perform an ADC
calibration.
Rev. B | Page 60 of 136
The simplified ADC transfer function can be described as
where the equation is valid for the voltage/temperature
channel ADC.
For the current channel ADC,
where K is dependent on the PGA gain setting and ADC mode.
Normal Mode
In normal mode, K = 1 for PGA gains of 1, 4, 8, 16, 32, and 64;
K = 2 for PGA gains of 2 and 128; K = 4 for a PGA gain of 256;
and K = 8 for a PGA gain of 512.
Low Power Mode
In low power mode, K = 32 for a PGA gain of 128. In addition,
if the REG_AVDD/2 reference is used, the K factor doubles.
Low Power Plus Mode
In low power plus mode, K = 8 for a PGA gain of 512. In addition,
if the REG_AVDD/2 reference is used, the K factor doubles.
ADC DIAGNOSTICS
The ADuC7034 features diagnostic capability on both ADCs.
Current ADC Diagnostics
The ADuC7034 features the capability to detect open-circuit
conditions on the application board. This is accomplished using
the two current sources on IIN+ and IIN−, which are controlled
via ADC0CON[14:13].
Note that the IIN+ and IIN− current sources have a tolerance of
±30%. Therefore, a PGA gain ≥ 2 (ADC0CON[3:0] ≥ 0001)
must be used when current sources are enabled.
Voltage/Temperature ADC Diagnostics
The ADuC7034 features the capability to detect open-circuit
conditions on the voltage and temperature channel inputs. This
is accomplished using the two current sources on VTEMP and
GND_SW, which are controlled via ADC1CON[14:13].
ADC
ADC
OUT
OUT
=
=
V
V
IN
IN
V
V
×
×
REF
REF
PGA
PGA
ADCOF
K
×
ADCOF
×
ADCGN
×
ADCGN
ADCGN
ADCGN
NOM
NOM

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