ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 28

• Manufacturer Part Number: ADUC7034BCPZ-RL
• Description: IC,Battery Management,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7034BCPZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 115°C
• Package / Case: 48-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7034
FEE0DAT Register
Name:
Address:
Default Value:
Access:
Function:
FLASH/EE MEMORY SECURITY
The 30 kB of Flash/EE memory available to the user can be read
and write protected using the FFE0HID register.
The FEE0HID MMR protects the 30 kB of Flash/EE memory.
Bits[0:28] of this register write protect Page 0 to Page 57. Each bit
protects two pages, that is, 1 kB. Bit 29 to Bit 30 protect Page 58
and Page 59, respectively; that is, each bit write protects a single
page of 512 bytes. The MSB of this register (Bit 31) protects the
entire Flash/EE from being read through JTAG.
The FEE0PRO register mirrors the bit definitions of the FEE0HID
MMR. The FEE0PRO MMR allows user code to lock the pro-
tection or security configuration of the Flash/EE memory so
Table 16. FEE0HID MMR and FEE0PRO MMR Bit Designations
Bit
31
30
29
28 to 0
FEE0DAT
0xFFFF0E0C
0x0000
Read/write access
This 16-bit register contains the data either
read from or to be written to the Flash/EE
memory.
Description
Read protection bit.
Set by user code to allow read access to the 32 kB Flash/EE block via JTAG.
Cleared by user code to read protect the 32 kB Flash/EE block code.
Write protection bit.
Set by user code to allow writes to Page 59.
Cleared by user code to write protect Page 59.
Write protection bit.
Set by user code to allow writes to Page 58.
Cleared by user code to write protect Page 58.
Write protection bits.
Set by user code to allow writes to Page 0 to Page 57 of the 30 kB Flash/EE code memory. Each bit write protects two
pages and each page consists of 512 bytes.
Cleared by user code to write protect Page 0 to Page 57 of the 30 kB Flash/EE code memory. Each bit write protects two
pages and each page consists of 512 bytes.
Rev. B | Page 28 of 136
that the protection configuration is automatically loaded upon
subsequent power-on or reset events. This flexibility allows
the user to temporarily set and test protection settings using
the FEE0HID MMR and then lock the required protection
configuration (using FEE0PRO) when shipping protection
systems into the field.
There are three levels of protection: temporary protection,
keyed permanent protection, and permanent protection.
Flash/EE Memory Protection Registers
Name:
Address:
Default Value:
Access:
Function:
FEE0HID and FEE0PRO
0xFFFF0E20 (for FEE0HID) and 0xFFFF0E1C
(for FEE0PRO)
0xFFFFFFFF (for FEE0HID) and 0x00000000
(for FEE0PRO)
Read/write access
These registers are written by user code to
configure the protection of the Flash/EE
memory.