ADUC7034BCPZ-RL Analog Devices Inc, ADUC7034BCPZ-RL Datasheet - Page 17

IC,Battery Management,LLCC,48PIN,PLASTIC

ADUC7034BCPZ-RL

Manufacturer Part Number
ADUC7034BCPZ-RL
Description
IC,Battery Management,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7034BCPZ-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 115°C
Package / Case
48-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Pin No.
11
12
13
14
15
18
19
20
21, 22
24
27
28
29
30
31
33
36
37
41
42
44
46
47
48
EPAD
1
I = input, O = output, S = supply.
Mnemonic
NTRST
TMS
VBAT
VREF
GND_SW
VTEMP
IIN+
IIN−
AGND
REG_AVDD
GPIO_0/IRQ0/SS
GPIO_1/SCLK
GPIO_2/MISO
GPIO_3/MOSI
GPIO_4/ECLK
REG_DVDD
XTAL1
XTAL2
WU
VDD
VSS
STI
IO_VSS
LIN/BSD
Exposed Pad
Type
I
I
I
I
I
I
I
I
S
S
I/O
I/O
I/O
S
O
I
I/O
S
S
I/O
S
I/O
I/O
I/O
1
Description
JTAG Test Reset. This reset input pin is one of the standard 5-pin JTAG debug ports on the part.
NTRST is an input pin only and has an internal weak pull-down resistor. This pin should be left
unconnected when not in use. NTRST is also monitored by the on-chip kernel to enable LIN
boot load mode.
JTAG Test Mode Select. This mode select input pin is one of the standard 5-pin JTAG debug
ports on the part. TMS is an input pin only and has an internal weak pull-up resistor. This pin
should be left unconnected when not in use.
Battery Voltage Input to Resistor Divider.
External Reference Input Terminal. When this input is not used, connect it directly to the AGND
system ground. This pin should be left unconnected when not in use.
Switch to Internal Analog Ground Reference. This pin is the negative input for the external
temperature channel and the external reference. When this input is not used, connect it directly
to the AGND system ground.
External Pin for NTC/PTC Temperature Measurement.
Positive Differential Input for Current Channel.
Negative Differential Input for Current Channel.
Ground Reference for On-Chip Precision Analog Circuits.
Nominal 2.6 V Output from On-Chip Regulator.
General-Purpose Digital IO 0/External Interrupt Request 0 (Active High)/Slave Select Input (SPI
Interface). By default and after a power-on reset, this pin is configured as an input. The pin has
an internal weak pull-up resistor and should be left unconnected when not in use.
General-Purpose Digital IO 1/Serial Clock Input (SPI Interface). By default and after a power-on
reset, this pin is configured as an input. The pin has an internal weak pull-up resistor and should
be left unconnected when not in use.
General-Purpose Digital IO 2/Master Input, Slave Output (SPI Interface). By default and after a
power-on reset, this pin is configured as an input. The pin has an internal weak pull-up resistor
and should be left unconnected when not in use.
General-Purpose Digital IO 3/Master Output, Slave Input (SPI Interface). By default and after a
power-on reset, this pin is configured as an input. The pin has an internal weak pull-up resistor
and should be left unconnected when not in use.
General-Purpose Digital IO 4/2.56 MHz Clock Output. By default and after a power-on reset, this
pin is configured as an input. The pin has an internal weak pull-up resistor and should be left
unconnected when not in use.
Nominal 2.6 V Output from the On-Chip Regulator.
Crystal Oscillator Output. If an external crystal is not used, this pin should be left unconnected.
Crystal Oscillator Input. If an external crystal is not used, connect this pin to the DGND system
ground.
High Voltage Wake-Up. This high voltage I/O pin has an internal 10 kΩ pull-down resistor and a
high-side driver to VDD. If this pin is not being used, it should not be connected externally.
Battery Power Supply to On-Chip Regulator.
Ground Reference. This is the ground reference for the internal voltage regulators.
High Voltage Serial Test Interface Output. If this pin is not used, externally connect it to the
IO_VSS ground reference.
Ground Reference for High Voltage I/O Pins.
Local Interconnect Network IO/Bit Serial Device IO. This is a high voltage pin.
The exposed pad should be connected to digital ground.
Rev. B | Page 17 of 136
ADuC7034

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